| Age | Commit message (Expand) | Author |
|---|---|---|
| 2017-09-22 | soc/intel/skylake: add Kabylake Celeron base SKU | Gaggery Tsai |
| 2017-06-23 | soc/intel/skylake: Use CPU MP Init Common code | Barnali Sarkar |
| 2017-06-06 | soc/intel/skylake: Use PCI IDs from device/pci_ids.h | Subrata Banik |
| 2017-04-24 | soc/intel/skylake: Add ID's for Kabylake-R | Naresh G Solanki |
| 2017-03-17 | soc/intel/skylake: Fix remaining issues detected by checkpatch | Lee Leahy |
| 2017-02-16 | soc/intel/skylake: Add CPU, PCH, MCH, IGD, XHCI and UART IDs for SKL/KBL HALO... | Sooi, Li Cheng |
| 2016-11-07 | soc/intel/skylake: Add device id for PCH-Y | Naresh G Solanki |
| 2016-08-30 | soc/intel/skylake: Include Kabylake specific IGD Device IDs | Barnali Sarkar |
| 2016-08-18 | soc/intel/skylake: Move bootblock specific code from skylake/romstage | Naresh G Solanki |
 |
index : coreboot.git | |
| my copy of coreboot | gitea |
| aboutsummaryrefslogtreecommitdiff |