| Age | Commit message (Expand) | Author |
|---|---|---|
| 2015-10-15 | cpu/mtrr.h: Fix macro names for MTRR registers | Alexandru Gagniuc |
| 2015-10-11 | skylake: Leave SPI controller enabled | Lee Leahy |
| 2015-10-11 | skylake: SPI code cleanup | Lee Leahy |
| 2015-08-13 | skylake: fix garbled patch from upstream | Aaron Durbin |
| 2015-07-29 | Skylake: Fix microcode reload in bootblock cpu init | Rizwan Qureshi |
| 2015-07-16 | soc/intel: Add Skylake SOC support | Lee Leahy |
| 2015-07-16 | soc/intel/skylake: Use Broadwell as comparision base for Skylake SOC | Lee Leahy |
 |
index : coreboot.git | |
| my copy of coreboot | gitea |
| aboutsummaryrefslogtreecommitdiff |