coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2019-10-25	soc/intel: Drop wrong _ADR objects	Elyes HAOUAS
2019-08-30	soc/intel/skl/acpi: add description for missing PCIe ports	Maxim Polyakov
2019-06-08	src/soc/intel/skylake/acpi: Remove Return for PS0/3	Christian Walter
2019-03-08	coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)	Julius Werner
2018-11-30	cpu/intel/common: Use a common acpi/cpu.asl file	Arthur Heymans
2018-11-30	soc/intel/skylake: Rework acpi/cpu.asl	Arthur Heymans
2018-11-15	soc/intel/skylake/acpi/dptf: Add support for Multi-DPTF Profile	Karthikeyan Ramasubramanian
2018-11-15	ec/google/chromeec/acpi: Rename EC_ENABLE_TABLET_EVENT config	Karthikeyan Ramasubramanian
2018-10-08	src: Use tabs for indentation	Elyes HAOUAS
2018-10-02	soc/intel/skylake: Fix spelling mistake	Subrata Banik
2018-10-02	soc/intel/skylake: Replace white space with tab	Subrata Banik
2018-08-21	soc/intel/skylake: Remove unsupported sleepstates in ACPI table	Lucas Chen
2018-08-13	soc/intel/skylake: use unique _uid	Matt Delco
2018-05-15	soc/intel/skylake: check DPTF_TSR1_ACTIVE_AC* in _ACx methods	John Su
2018-05-01	chromeec platforms: Update ACPI thermal event handler call	Martin Roth
2018-04-17	soc/intel/skylake: check DPTF_TSR0_ACTIVE_AC* in _ACx methods	Frank Wu
2018-03-30	soc/intel/skylake: Save/restore GMA OpRegion address	Matt DeVillier
2018-02-28	skylake: Fix unwanted disablement of ACPI UPWE	Kane Chen
2018-02-22	skylake: remove legacy devices from ACPI	Patrick Georgi
2018-02-16	soc/intel/skylake: Switch to common PCR ASL	Lijian Zhao
2018-01-30	soc/intel/skylake: Add support for mode-aware DPTF	Furquan Shaikh
2017-12-07	Revert "soc/intel/skylake: Clean up SoC ASL code."	Matt DeVillier
2017-10-20	soc/intel/skylake: Add GNVS variables and include SGX ASL	Pratik Prajapati
2017-10-02	soc/intel/skylake: Use common/block/gpio	Hannah Williams
2017-09-27	soc/intel/skylake: Remove CCA object for IMGU and CIO2 devices	V Sowmya
2017-08-10	soc/intel/skylake: Enable UART debug controller on S3 resume	Furquan Shaikh
2017-08-08	soc/intel: Remove ACPI notification for fan speed change	Sumeet Pawnikar
2017-07-12	Revert "soc/intel/skylake: storage: Add 2ms delay before exiting D3"	Subrata Banik
2017-07-12	soc/intel/skylake: Perform PCR read after all PCR write	Subrata Banik
2017-06-27	soc/intel/skylake: storage: Use word access for power state registers	Duncan Laurie
2017-06-27	soc/intel/skylake: storage: Add 2ms delay before exiting D3	Duncan Laurie
2017-06-09	soc/skylake: add ACPI method to generate USB port info	Matt DeVillier
2017-06-07	src: change coreboot to lowercase	Martin Roth
2017-05-25	soc/intel/skylake: Implement GPIO ACPI AML generating functions	Furquan Shaikh
2017-04-28	soc/intel/skylake: Use ITSS common code	Bora Guvendik
2017-04-19	soc/intel/skylake: Add ASL entries for IMGU and CIO2 devices	Sowmya
2017-04-10	soc/intel/skylake: Use common PCR module	Subrata Banik
2017-04-07	soc/intel/skylake: Enable XHCI clock gate control in ACPI	Naresh G Solanki
2017-03-10	soc/intel/skylake:Add _DSM method to reduce D3 cold delay for eMMC controller	sowmyav
2017-03-09	soc/intel/skylake: Add SKL SOC PCH H GPIO support	Li Cheng Sooi
2017-01-19	soc/intel/skylake: Add SATA interrupt for APIC mode	Sooi, Li Cheng
2016-11-07	soc/intel/skylake: Add _ACx methods for TSR0 sensor for fan control	Sumeet Pawnikar
2016-11-07	soc/intel/skylake: Avoid use of variable Local0 in TEVT in thermal.asl	Naresh G Solanki
2016-10-26	intel/skylake: Add support to enable wake-on-usb attach/detach	Furquan Shaikh
2016-08-08	soc/intel/skylake: Clean up SoC ASL code.	Barnali Sarkar
2016-08-04	soc/intel/skylake: Correct address of I2C5 Device	Barnali Sarkar
2016-08-01	Add newlines at the end of all coreboot files	Martin Roth
2016-07-31	Remove extra newlines from the end of all coreboot files.	Martin Roth
2016-07-29	skylake: fix VSDIO is at 0.8V when SDCard is not inserted	Zhuo-hao.Lee
2016-07-01	skylake: Generate ACPI timing values for I2C devices	Duncan Laurie
2016-03-08	skylake: Add and fill out CID1 NVS field	Duncan Laurie
2016-02-15	skylake: acpi: Make GRXS method serialized	Duncan Laurie
2016-01-16	intel/skylake: Add kconfig option to skip Native SD Controller	Subrata Banik
2016-01-15	intel/skylake: Add GPIO ACPI Apis.	Subrata Banik
2016-01-13	tree: drop last paragraph of GPL copyright header from new files	Martin Roth
2015-12-03	intel/skylake: Add ACPI device for audio controller	Duncan Laurie
2015-11-05	intel/skylake: Add Fan control support	Sumeet Pawnikar
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-10-27	intel/skylake: IRQ programming through UPD	Subrata Banik
2015-10-14	skylake: ACPI: Fix compiler warnings with iasl-20150717	Duncan Laurie
2015-09-28	skylake: Work around issue in ACPI interpreter	Duncan Laurie
2015-09-28	skylake: ACPI: Remove Configurable TDP support code	Duncan Laurie
2015-09-17	skylake: Use common ACPI _SWS code	Duncan Laurie
2015-09-09	skylake: dptf: Add TSR3 thermal sensor and CPU code cleanup	Duncan Laurie
2015-09-09	intel/skylake: ACPI: Clean up formatting in and fix ASL code	Duncan Laurie
2015-09-08	skylake: ACPI: Clean up GPIO controller	Duncan Laurie
2015-09-08	skylake: ACPI: Clean up and fix XHCI ACPI Device	Duncan Laurie
2015-09-08	skylake: ACPI: Remove SerialIO ACPI mode code	Duncan Laurie
2015-09-08	skylake: ACPI: Move storage controllers to separate file	Duncan Laurie
2015-09-08	skylake: ACPI: Remove itss.asl and cleanup irqlinks.asl	Duncan Laurie
2015-09-08	skylake: ACPI: Add functions for PCR access	Duncan Laurie
2015-09-08	skylake: ACPI: Clean up pch.asl	Duncan Laurie
2015-09-08	skylake: ACPI: Fix and clean up PCIE _PRT entries	Duncan Laurie
2015-08-29	intel/skylake: Add support for DPTF	Shilpa Sreeramalu
2015-08-29	intel/skylake: Clean up Serial IO DMA channels	Archana Patni
2015-08-14	Skylake: Add ASL code to enable GPIO controller	Archana Patni
2015-08-14	skylake: fix invalid GNVS base address	Aaron Durbin
2015-07-17	skylake: remove whitespace from ASL files	Stefan Reinauer
2015-07-16	soc/intel: Add Skylake SOC support	Lee Leahy
2015-07-16	soc/intel/skylake: Use Broadwell as comparision base for Skylake SOC	Lee Leahy