coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-04-06	soc/intel/skylake: Use SPDX for GPL-2.0-only files	Angel Pons
2020-03-18	soc: Remove copyright notices	Patrick Georgi
2019-03-08	coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)	Julius Werner
2017-12-07	Revert "soc/intel/skylake: Clean up SoC ASL code."	Matt DeVillier
2017-07-12	Revert "soc/intel/skylake: storage: Add 2ms delay before exiting D3"	Subrata Banik
2017-06-27	soc/intel/skylake: storage: Use word access for power state registers	Duncan Laurie
2017-06-27	soc/intel/skylake: storage: Add 2ms delay before exiting D3	Duncan Laurie
2017-03-10	soc/intel/skylake:Add _DSM method to reduce D3 cold delay for eMMC controller	sowmyav
2016-08-08	soc/intel/skylake: Clean up SoC ASL code.	Barnali Sarkar
2016-08-01	Add newlines at the end of all coreboot files	Martin Roth
2016-07-29	skylake: fix VSDIO is at 0.8V when SDCard is not inserted	Zhuo-hao.Lee
2016-01-16	intel/skylake: Add kconfig option to skip Native SD Controller	Subrata Banik
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-10-14	skylake: ACPI: Fix compiler warnings with iasl-20150717	Duncan Laurie
2015-09-08	skylake: ACPI: Move storage controllers to separate file	Duncan Laurie