index
:
coreboot.git
macbookair5_2
macbookpro10_1
main
master
mbp101_medisable
mbp101_medisable_1
mbp82
x230
my copy of coreboot
gitea
about
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
soc
/
intel
/
skylake
/
acpi.c
Age
Commit message (
Expand
)
Author
2016-09-19
soc/intel/skylake: Add FSP 2.0 support in ramstage
Naresh G Solanki
2016-03-08
skylake: Add and fill out CID1 NVS field
Duncan Laurie
2016-02-04
intel/skylake: disable ACPI PM Timer to enable XTAL OSC shutdown
Archana Patni
2016-01-19
intel/skylake: Fix issues found by klockwork
Naresh G Solanki
2015-12-15
x86 acpi: remove ALIGN_CURRENT macro
Aaron Durbin
2015-12-03
intel/skylake: Remove unused code to add SSDT2
Duncan Laurie
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-10-27
intel/skylake: Add support for Gfx PEIM (AKA GOP)
robbie zhang
2015-09-17
skylake: Use common ACPI _SWS code
Duncan Laurie
2015-09-17
Skylake: update C state latency and power numbers
robbie zhang
2015-09-10
skylake: Move ACPI init to SOC instead of mainboard
Duncan Laurie
2015-09-10
skylake: Enable DPTF based on devicetree setting
Duncan Laurie
2015-08-14
skylake: provide clarification for FADT gpe0_blk_len
Aaron Durbin
2015-07-16
soc/intel: Add Skylake SOC support
Lee Leahy
2015-07-16
soc/intel/skylake: Use Broadwell as comparision base for Skylake SOC
Lee Leahy