coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2021-02-09	soc/amd,intel: Drop s3_resume parameter on FSP-S functions	Kyösti Mälkki
2020-05-12	device/pci_device: Extract pci_domain_set_resources from SOC	Raul E Rangel
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-04-06	soc/intel/quark: Use SPDX for GPL-2.0-only files	Angel Pons
2020-03-18	soc: Remove copyright notices	Patrick Georgi
2018-11-16	src: Remove unneeded include <console/console.h>	Elyes HAOUAS
2018-05-28	soc/intel/quark: Get rid of device_t	Elyes HAOUAS
2018-05-08	{mb,nb,soc}: Remove references to pci_bus_default_ops()	Nico Huber
2016-12-01	romstage_handoff: add helper to determine resume status	Aaron Durbin
2016-11-21	fsp2_0: implement stage cache for silicon init	Brandon Breitenstein
2016-08-05	soc/intel/quark: Clean up debug output levels	Lee Leahy
2016-08-03	soc/intel/quark: Prepare for FSP2.0 support	Lee Leahy
2016-08-03	soc/intel/quark: Remove use of EDK-II macros and data types	Lee Leahy
2016-05-05	soc/intel/quark: Add temperature sensor support	Lee Leahy
2016-05-02	soc/intel/quark: Remove UPD parameters	Lee Leahy
2016-03-08	soc/intel/quark: Add the UPD support for SiliconInit	Lee Leahy
2016-02-18	soc/intel/quark: Establish the Memory Map	Lee Leahy
2016-02-18	soc/intel/quark: Enumerate the PCI devices	Lee Leahy
2016-02-10	soc/intel/quark: Call FSP SiliconInit	Lee Leahy