| Age | Commit message (Expand) | Author |
|---|---|---|
| 2016-11-21 | fsp2_0: implement stage cache for silicon init | Brandon Breitenstein |
| 2016-08-05 | soc/intel/quark: Clean up debug output levels | Lee Leahy |
| 2016-08-03 | soc/intel/quark: Prepare for FSP2.0 support | Lee Leahy |
| 2016-08-03 | soc/intel/quark: Remove use of EDK-II macros and data types | Lee Leahy |
| 2016-05-05 | soc/intel/quark: Add temperature sensor support | Lee Leahy |
| 2016-05-02 | soc/intel/quark: Remove UPD parameters | Lee Leahy |
| 2016-03-08 | soc/intel/quark: Add the UPD support for SiliconInit | Lee Leahy |
| 2016-02-18 | soc/intel/quark: Establish the Memory Map | Lee Leahy |
| 2016-02-18 | soc/intel/quark: Enumerate the PCI devices | Lee Leahy |
| 2016-02-10 | soc/intel/quark: Call FSP SiliconInit | Lee Leahy |
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index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |