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path: root/src/soc/intel/quark/bootblock
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2018-11-23soc/intel/common: Bring DISPLAY_MTRRS into the lightNico Huber
Initially, I wanted to move only the Kconfig DISPLAY_MTRRS into the "Debug" menu. It turned out, though, that the code looks rather generic. No need to hide it in soc/intel/. To not bloat src/Kconfig up any further, start a new `Kconfig.debug` hierarchy just for debug options. If somebody wants to review the code if it's 100% generic, we could even get rid of HAVE_DISPLAY_MTRRS. Change-Id: Ibd0a64121bd6e4ab5d7fd835f3ac25d3f5011f24 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/29684 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-22bootblock: Allow more timestamps in bootblock_main_with_timestamp()Julius Werner
This patch adds more parameters to bootblock_main_with_timestamp() to give callers the opportunity to add additional timestamps that were recorded in the platform-specific initialization phase. Change-Id: Idf3a0fcf5aee88a33747afc69e055b95bd38750c Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/26339 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-03-07soc/intel/quark: Fix errors detected by checkpatchLee Leahy
Fix the errors detected by checkpatch and update the copyright dates. TEST=Build and run on Galileo Gen2 Change-Id: Idad062eaeca20519394c2cd24d803c546d8e0ae0 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: https://review.coreboot.org/18591 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2017-01-03soc/intel/quark: Add early debugging codeLee Leahy
Add Kconfig values and early debugging code to better segment and debug the early code in bootblock by using the SD LED as an indicator. Update the help text for the debug Kconfig values to point to the various failure locations. TEST=Build and run on Galileo Gen2 Change-Id: I1cd62eba3e9547cb1dd7f547aaec5d4827e14633 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: https://review.coreboot.org/17985 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-08-05soc/intel/quark: Add bootblock_c_entryLee Leahy
Add the bootblock_c_entry routine to make it more explicit where the code transitions from assembler to C. TEST=Build and run on Galileo Gen2 Change-Id: Ib5f580c30b58d3c82fedddf63c368e617d401515 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: https://review.coreboot.org/16064 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-08-03soc/intel/quark: Initialize MTRRs in bootblockLee Leahy
Initialize the MTRRs for use by bootblock and romstage. Display the MTRRs. TEST=Build and run on Galileo Gen2. Change-Id: Ib1d422c738820163f54771c65034ae77301237ec Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: https://review.coreboot.org/15861 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-07-14soc/intel/quark/bootblock: Remove clear_smi_and_wake_eventsJonathan Neuschäfer
It is not used in this file. Change-Id: I59bb41370b97b79073c0fd82b1dbcae9fd8a62d0 Reported-by: GCC 6.1.0 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/15552 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2016-06-12soc/intel/quark: Add C bootblockLee Leahy
Add a bootblock which builds with C_ENVIRONMENT_BOOTBLOCK selected. This is the first piece in supporting FSP 2.0. Move esraminit from romstage into the bootblock. Replace cache_as_ram with car_stage_entry.S and code in romstage.c TEST=Build and run on Galileo Gen2 Change-Id: I14d2af2adb6e75d4bff1ebfb863196df04d07daf Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: https://review.coreboot.org/15132 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>