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As per commit 865173153760 ("sconfig: Move config_of_soc from device.h
to static.h"), sources that require access to the devicetree should
directly include static.h so that it can be removed from device.h,
eliminating unnecessary dependencies on static.h for files that only
need the types and function declarations in device.h.
Change-Id: I3c118a707dfe7bb8932606f30eae52ef0b4c9efe
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84609
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
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As https://doc.coreboot.org/contributing/coding_style.html#typedefs
states: "In general, a pointer, or a struct that has elements that can
reasonably be directly accessed should never be a typedef". This
commit makes the Intel Panther Lake SoC code comply with this by using
explicitly `struct soc_intel_pantherlake_config' in the
soc/intel/pantherlake code as I have been suggested to for the
`fsp_params.c' files. The rule being the rule and consistency across
a project matters more than personal preferences.
The documentation lists five exceptions and none on them cover the use
of `config_t' instead `struct soc_intel_pantherlake' but I believe it
does not make the code better for the following three reasons:
1. It is repetitive, make the line longer and the code is in
soc/intel/pantherlake so obviously the config_t data structure is
the pantherlake soc configuration.
2. It makes re-usability from one generation to another unnecessarily
harder.
3. This config_t abstraction is required for and used by some common
block code anyway. Hence, we end-up with some code using `config_t'
and other using the final structure which break the consistency of
the code when the project in looked as a whole.
BUG=348678529
TEST=Google fatcat mainboard compiles
Change-Id: Ibe382615db1a7c7a0841d8fe4ae43c226e2c2021
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84561
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Ronak Kanabar <ronak.kanabar@intel.com>
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List of changes:
1. Add required Pather Lake SoC programming till bootblock.
2. Include only required headers into include/soc.
3. Include PTL related DID, BDF.
4. Includes additional minimal code required to compile the PTL SoC
and google/fatcat mainbaord.
5. Ref: Processor EDS documents
vol0.51 #815002
BUG=b:348678529
TEST=Verified on Intel® Simics® Pre Silicon Simulation platform for
PTL using google/fatcat mainboard.
Change-Id: Ibcfe71eec27cebf04f10ec343a73dd92f1272aca
Signed-off-by: Saurabh Mishra <mishra.saurabh@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83354
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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