| Age | Commit message (Expand) | Author |
|---|---|---|
| 2022-01-14 | soc/intel/jsl: Replace dt `HeciEnabled` by `HECI1 disable` config | Subrata Banik |
| 2021-05-07 | soc/intel/{adl,tgl,jsl}: Add smihandler_soc_disable_busmaster | Kane Chen |
| 2021-02-15 | soc/intel: Remove unused <console/console.h> | Elyes HAOUAS |
| 2020-05-11 | treewide: Remove "this file is part of" lines | Patrick Georgi |
| 2020-04-06 | soc/intel/jasperlake: Use SPDX for GPL-2.0-only files | Angel Pons |
| 2020-03-28 | soc/intel/jasperlake: Remove Tiger Lake SoC code from Jasper Lake | Aamir Bohra |
| 2020-03-28 | soc/intel/jasperlake: Add Jasper Lake SoC support | Aamir Bohra |
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index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |