coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2023-06-23	commonlib/console/post_code.h: Change post code prefix to POSTCODE	lilacious
2022-04-27	soc/intel/cmn/lockdown: Perform SA lockdown configuration	Subrata Banik
2022-04-22	soc/intel/jasperlake: CNVi: Enable fewer wakeups to reduce SoC power consumption	Jamie Chen
2021-11-22	soc/intel/{adl,ehl,jsl,tgl}: Remove unused header `thermal.h`	Subrata Banik
2021-10-17	soc/intel: move disabling of PM Timer to SoC PMC code	Michael Niewöhner
2021-10-12	soc/intel: replace dt option PmTimerDisabled by Kconfig	Michael Niewöhner
2021-09-05	soc/intel/jasperlake: Lock PAM registers in finalize	Tim Wawrzynczak
2021-08-04	Move post_codes.h to commonlib/console/	Ricardo Quesada
2021-01-08	soc/intel/jasperlake: Enable USB2 PHY SUS PG for s0ix qualification	Krishna Prasad Bhat
2020-10-26	src: Include <arch/io.h> when appropriate	Elyes HAOUAS
2020-10-19	soc/intel/*: drop useless XTAL shutdown qualification code	Michael Niewöhner
2020-10-03	soc/intel: Make use of PMC low power program from common block	Subrata Banik
2020-07-06	soc/intel: Drop unused `#include <reg_script.h>`	Angel Pons
2020-06-16	arch/x86: Create helper for APM_CNT SMI triggers	Kyösti Mälkki
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-04-06	soc/intel/jasperlake: Use SPDX for GPL-2.0-only files	Angel Pons
2020-03-28	soc/intel/jasperlake: Remove Tiger Lake SoC code from Jasper Lake	Aamir Bohra
2020-03-28	soc/intel/jasperlake: Add Jasper Lake SoC support	Aamir Bohra