coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2022-01-19	soc/intel/common/cpu: Use SoC overrides to get CPU privilege level	Subrata Banik
2022-01-10	src/soc/intel: Remove unused <console/console.h>	Elyes HAOUAS
2021-10-22	cpu/x86/mp_init: move printing of failure message into mp_init_with_smm	Felix Held
2021-10-21	cpu/x86/mp_init: use cb_err as mp_init_with_smm return type	Felix Held
2021-10-12	soc/intel/*/cpu.c: Add missing space in comment	Angel Pons
2021-05-07	soc/intel/{adl,tgl,jsl}: Enable power button smi after BS_CHIPS_EXIT	Kane Chen
2021-02-11	src: Remove unused <arch/cpu.h>	Elyes HAOUAS
2021-02-09	soc/amd,intel: Drop s3_resume parameter on FSP-S functions	Kyösti Mälkki
2020-10-28	soc/intel: deduplicate ACPI timer emulation	Michael Niewöhner
2020-10-26	soc/intel: drop unneeded ISST configuration code	Michael Niewöhner
2020-10-24	{cpu,soc}/intel: deduplicate cpu code	Michael Niewöhner
2020-10-21	soc/intel: convert XTAL frequency constant to Kconfig	Michael Niewöhner
2020-08-09	soc/intel/{icl.tgl,jsl}: Remove SMRAM register programming	Aamir Bohra
2020-06-30	jasperlake: enable tcc_offset functionality	Sumeet R Pawnikar
2020-06-16	soc/intel/common: Replace smm_soutbridge_enable(SMI_FLAGS)	Kyösti Mälkki
2020-06-03	soc/intel/jasperlake: Update C-States info	Ronak Kanabar
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-04-06	soc/intel/jasperlake: Use SPDX for GPL-2.0-only files	Angel Pons
2020-03-28	soc/intel/jasperlake: Remove Tiger Lake SoC code from Jasper Lake	Aamir Bohra
2020-03-28	soc/intel/jasperlake: Add Jasper Lake SoC support	Aamir Bohra