coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2022-01-01	soc/intel/jasperlake: Add CdClock frequency config	Simon Yang
2021-10-12	soc/intel: replace dt option PmTimerDisabled by Kconfig	Michael Niewöhner
2021-09-17	soc/intel/{ehl,jsl}: make use of Kconfig options for PRMRR size	Michael Niewöhner
2021-07-28	soc/intel/jsl: Add disable_external_bypass_vr config	Simon Yang
2021-07-28	soc/intel/jasperlake: add pcie modphy settings	Jamie Chen
2021-07-26	soc/intel/jasperlake: Set xHCI LFPS period sampling off time	Ben Kao
2021-04-21	soc/intel/alderlake: rename CONFIG_MAX_PCIE_CLOCKS to CONFIG_MAX_PCIE_CLOCK_SRC	Rizwan Qureshi
2021-03-03	soc/intel: Retype `CnviBtAudioOffload` devicetree option	Angel Pons
2021-01-18	soc/intel/common: Move L1_substates_control to pcie_rp.h	Eric Lai
2021-01-08	soc/intel/jasperlake: Update acoustic noise related parameters	Maulik V Vaghela
2020-12-30	soc/intel: hook up new gpio device in the soc chips	Michael Niewöhner
2020-12-14	soc/intel/jasperlake: Drop unreferenced devicetree settings	Angel Pons
2020-12-05	soc/intel/jasperlake: Add Acoustic noise mitigation configuration	Maulik V Vaghela
2020-11-09	soc/intel/jasperlake: Enable Intel FIVR RFI settings	Maulik V Vaghela
2020-11-09	soc/intel/*/chip: Remove unused devicetree entry	Patrick Rudolph
2020-10-26	mb/*,soc/intel: drop the obsolete dt option `speed_shift_enable`	Michael Niewöhner
2020-10-12	soc/intel/jasperlake: Correct SaGv mapping	Aamir Bohra
2020-10-08	soc/intel/jasperlake: Add VR Configuration settings	Meera Ravindranath
2020-09-22	soc/intel/jasperlake: Enable processor thermal control using PCI_DEVFN	Sumeet R Pawnikar
2020-09-14	soc/intel/{cnl,icl,jsl,tgl}: Clean up chip.h	Subrata Banik
2020-08-17	soc/intel/jasperlake: Add FSP UPDs for minimum assertion widths	V Sowmya
2020-07-23	soc/intel/jasperlake: Add the SkipCpuReplacementCheck configuration	V Sowmya
2020-05-18	jasperlake: update processor power limits configuration	Sumeet R Pawnikar
2020-05-12	soc/intel/jasperlake: Add SATA related UPDs configuration	Ronak Kanabar
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-05-01	soc/intel/{jsl,tgl}: Rename PcdDebugInterfaceFlags macros for better understa...	Subrata Banik
2020-05-01	soc/intel/jasperlake: Fill PcieRpClkReqDetect from devicetree	Meera Ravindranath
2020-04-06	soc/intel/jasperlake: Use SPDX for GPL-2.0-only files	Angel Pons
2020-03-28	soc/intel/jasperlake: Remove Tiger Lake SoC code from Jasper Lake	Aamir Bohra
2020-03-28	soc/intel/jasperlake: Add Jasper Lake SoC support	Aamir Bohra