Age | Commit message (Collapse) | Author |
|
commit msg copied from
commit id: 64c9f1584c63403207ee85b1d54ca594ae1fbedf
The GPIO drivers in Windows and Linux for the Icelake CPU
have a sparse GPIO map and do not allocate pins contiguously.
Each GPIO group is allocated as 32 pads regardless of whether
the hardware actually has that many in the group.
It appears this originated with a bug in Windows/UEFI and was
carried over to Linux in order to work with existing firmware:
https://lore.kernel.org/patchwork/patch/855244/
In order to support using ACPI GPIOs it is necessary for coreboot
to be compatible with this implementation. The GPIO groups that
are usable by the OS are declared with a pad base which is then
used to compute the number for ACPI GPIOs.
Change-Id: I94fafd8af13cf229f5c467de5179aed021465739
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/30276
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
|
|
This implementation updates the GPIO pins, communities and
group mapping.
Change details:
1. Update 5 GPIO community includes 11 GPIO groups
GPIO COM 0
GPP_G, GPP_B, GPP_A
GPIO COM 1
GPP_H, GPP_D, GPP_F
GPIO COM 2
GPD
GPIO COM 4
GPP_C, GPP_E
GPIO COM 5
GPP_R, GPP_S
2. Update GPIO IRQ routing.
3. Add GPIO configuration for iclrvp board.
Change-Id: I223abacc18f78631a42f340952f13d45fa9a4703
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Signed-off-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-on: https://review.coreboot.org/29495
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Shelley Chen <shchen@google.com>
|
|
Clone entirely from Cannonlake
commit id: 3487095304dbbbf66de86f8bce0e40b7acb3ea27
List of changes on top off initial cannonlake clone
1. Replace "Cannonlake" with "Icelake"
2. Replace "cnl" with "icl"
3. Replace "cnp" with "icp"
4. Rename structrue based on Cannonlake with Icelake
5. Remove and clean below files
5.a. All NHLT blobs and related files.
5.b. remove cnl_memcfg_init.c file, will be added later.
5.c. Remove vr_config.c, this is WIP.
5.d. Clean up upd override in fsp_params.c,
will be added once FSP available.
5.e Remove CNL-H based GPIO configuartion.
Ice Lake specific changes will follow in subsequent patches.
Change-Id: I756fa7275c4190aebc0695f14484498aaf5662a5
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Signed-off-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-on: https://review.coreboot.org/29162
Reviewed-by: Shelley Chen <shchen@google.com>
Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Reviewed-by: Naresh Solanki <naresh.solanki@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
|