coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2020-10-12	soc/intel: Configure PAVP at compile-time	Benjamin Doron
2020-09-06	soc/intel: skl,cnl,icl,jsl,tgl: disable usb over-current pin by default	Michael Niewöhner
2020-08-07	src/soc/intel/icelake: Allow option to use USE_INTEL_FSP_MP_INIT	Subrata Banik
2020-08-01	soc/intel/{icl,jsl,tgl}: Remove SkipMpInit UPD as deprecated	Subrata Banik
2020-07-26	src: Update bare access to BOOL CONFIG_ vals to CONFIG()	Martin Roth
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-04-06	soc/intel/icelake: Use SPDX for GPL-2.0-only files	Angel Pons
2020-03-18	soc: Remove copyright notices	Patrick Georgi
2020-02-26	soc/intel/{cnl,icl}: Avoid static 8254 clock gating on S3 resume	Subrata Banik
2020-02-24	soc/intel/icelake: Skip FSP-S IGD related UPD override	Subrata Banik
2019-11-22	soc/intel/icelake: Make CpuMpPpi implementation default for ICL	Subrata Banik
2019-10-31	soc/intel/icelake: adapt FSP GOP param to match the other FSP2.0 platforms	Michael Niewöhner
2019-10-02	soc/intel: Replace config_of_path() with config_of_soc()	Kyösti Mälkki
2019-08-05	soc/intel/{cnl,icl}: Add support to get LPSS controllers list from SOC	Aamir Bohra
2019-07-18	soc/intel: Use config_of_path(SA_DEVFN_ROOT)	Kyösti Mälkki
2019-07-14	soc/intel/icelake: Update FSP UPDs if IGD is disable in devicetree	Subrata Banik
2019-07-11	soc/intel/common/timer: Move USE_LEGACY_8254_TIMER into common/block/timer	Subrata Banik
2019-07-09	soc/intel/icelake: Refer to soc/soc_chip.h rather than chip.h	Subrata Banik
2019-06-13	soc/intel/icelake: Replace PCI device LPC to ESPI as per EDS	Subrata Banik
2019-06-09	soc/intel/icelake: Pass FSP-M/S UPD as per ICL requirement	Aamir Bohra
2018-10-26	soc/intel/icelake: Do initial SoC commit	Aamir Bohra