Age | Commit message (Expand) | Author |
2020-04-06 | soc/intel/icelake: Use SPDX for GPL-2.0-only files | Angel Pons |
2020-03-18 | soc: Remove copyright notices | Patrick Georgi |
2020-02-17 | soc/intel/{cnl,icl,skl,tgl}/bootblock: Update text for DMI PCR 2774 | Wim Vervoorn |
2020-02-17 | soc/intel{cnl,icl,skl,tgl}/bootblock: Make sure DMI PCR 2770 is set | Wim Vervoorn |
2019-11-15 | soc/intel/{icl,tgl}: Rename pch_early_init() to pch_init() | Subrata Banik |
2019-11-07 | soc/intel/icelake: Refactor pch_early_init() code | Subrata Banik |
2019-11-04 | soc/intel/icelake: Remove unused headers | Subrata Banik |
2019-11-04 | soc/intel/icelake: Clean up report_cpu_info() function | Subrata Banik |
2019-10-31 | soc/intel/{cnl,icl,skl}: Fix multiple whitespace issue | Subrata Banik |
2019-10-31 | soc/intel/icelake: Enable caching on SPI memory-mapped boot device unconditio... | Subrata Banik |
2019-08-26 | lib/bootblock: Add simplified entry with basetime | Kyösti Mälkki |
2019-06-13 | soc/intel/icelake: Replace PCI device LPC to ESPI as per EDS | Subrata Banik |
2019-04-23 | src: Use include <console/console.h> when appropriate | Elyes HAOUAS |
2019-03-08 | coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) | Julius Werner |
2019-03-04 | device/mmio.h: Add include file for MMIO ops | Kyösti Mälkki |
2019-03-04 | arch/io.h: Drop unnecessary include | Kyösti Mälkki |
2019-03-01 | device/pci: Fix PCI accessor headers | Kyösti Mälkki |
2019-01-10 | soc/intel/common/block: Move tco common functions into block/smbus | Subrata Banik |
2019-01-09 | soc/intel: Clean mess around UART_DEBUG | Nico Huber |
2018-12-19 | soc: Remove useless include <device/pci_ids.h> | Elyes HAOUAS |
2018-12-13 | cpuid: Add helper function for cpuid(1) functions | Subrata Banik |
2018-11-28 | soc/intel/icelake: Fix IO decode setup | Subrata Banik |
2018-11-07 | soc/intel/common: Include Icelake device IDs | Aamir Bohra |
2018-11-05 | soc/intel/icelake: Add PID based on Icelake EDS | Aamir Bohra |
2018-10-31 | soc/intel/icelake: Open ports 0x60,0x64 for keyboard controller | Shelley Chen |
2018-10-26 | soc/intel/icelake: Do initial SoC commit | Aamir Bohra |