| Age | Commit message (Expand) | Author |
|---|---|---|
| 2015-05-21 | Remove address from GPLv2 headers | Patrick Georgi |
| 2015-04-04 | build system: rename __BOOT_BLOCK__ and __VER_STAGE__ | Patrick Georgi |
| 2015-02-15 | x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer | Kevin Paul Herbert |
| 2015-02-13 | fsp_baytrail: Add macros to define 20K pull-up and down | Werner Zeh |
| 2014-12-19 | fsp_baytrail: Initialize LPC pads in bootblock for port 80 | Martin Roth |
| 2014-12-19 | fsp_baytrail: Remove GPIO_NC1 #define | Martin Roth |
| 2014-12-19 | baytrail SOCs: Add missing comma in gpio.h | Martin Roth |
| 2014-12-17 | fsp_baytrail: Add code to read GPIOs in romstage | Martin Roth |
| 2014-08-01 | fsp_baytrail/.../gpio.h: Add GPIO_NC1 for GPIOS on func 1 | Martin Roth |
| 2014-05-29 | fsp_baytrail: Add the FSP version of Intel's Bay Trail-I chip | Martin Roth |
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index : coreboot.git | |
| my copy of coreboot | gitea |
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