coreboot.git - my copy of coreboot

Age	Commit message (Collapse)	Author
2021-02-15	soc/intel: Remove unused <console/console.h>	Elyes HAOUAS
	Change-Id: I630b7b0b1d564bcd99358caaaef4afd78c22866c Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50528 Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-09-08	soc/intel/elkhartlake: Do initial SoC commit till ramstage	Tan, Lean Sheng
	Clone entirely from Jasperlake List of changes on top off initial jasperlake clone 1. Replace "Jasperlake" with "Elkhartlake" 2. Replace "jsl" with "ehl" 3. Replace "jsp" with "mcc" 4. Rename structure based on Jasperlake with Elkhartlake 5. Clean up upd override in fsp_params.c will be added later 6. Sort #include files alphabetically as per comment 7. Remove doc details from espi.c until it is ready 8. Remove pch_isclk & camera clocks related codes 9. Add new #define NMI_STS_CNT & NMI_EN as per comment Signed-off-by: Tan, Lean Sheng <lean.sheng.tan@intel.com> Change-Id: I372b0bb5912e013445ed8df7c58d0a9ee9a7cf35 Reviewed-on: https://review.coreboot.org/c/coreboot/+/44802 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com>