coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2018-06-06	arch/x86: Make RELOCATABLE_RAMSTAGE the default	Kyösti Mälkki
2018-06-04	src/soc: Get rid of whitespace before tab	Elyes HAOUAS
2018-06-04	soc/{amd,intel}: Use postcar_frame_add_romcache()	Nico Huber
2018-06-04	soc/intel/denverton_ns: Get rid of device_t	Elyes HAOUAS
2018-05-31	soc/{amd,intel}: Use CACHE_ROM_(BASE\|SIZE)	Nico Huber
2018-05-22	bootblock: Allow more timestamps in bootblock_main_with_timestamp()	Julius Werner
2018-05-14	soc/intel/denverton_ns: Enable common code for CPU	Julien Viard de Galbert
2018-05-14	soc/intel/denverton_ns: port gpio to intelblock	Julien Viard de Galbert
2018-05-14	soc/intel/denverton_ns + mb: Rename gpio configuration	Julien Viard de Galbert
2018-05-08	soc/intel/denverton_ns: Fill dimm info for SMBIOS table 17	Julien Viard de Galbert
2018-05-08	{mb,nb,soc}: Remove references to pci_bus_default_ops()	Nico Huber
2018-04-24	compiler.h: add __weak macro	Aaron Durbin
2018-03-30	soc/intel/common/opregion: Get rid of opregion.c	Patrick Rudolph
2018-03-09	soc/intel/denverton_ns: Update UART legacy mode to keep FSP traces	Julien Viard de Galbert
2018-02-20	src/soc: Fix various typos	Jonathan Neuschäfer
2018-02-09	drivers/intel/fsp2_0: Remove fsp_find_smbios_memory_info() from FSP2.0 driver	Subrata Banik
2018-01-31	drivers/intel/fsp2_0: Unbind UDK2015 Kconfig from FSP2.0 driver	Subrata Banik
2018-01-28	soc/intel/denverton_ns: Rename HARCUVAR macros to DENVERTON	Julien Viard de Galbert
2017-12-20	soc/intel/denverton_ns: Add Denverton-AD system agent id	Lew, Chee Soon
2017-11-23	Constify struct cpu_device_id instances	Jonathan Neuschäfer
2017-11-07	soc/intel/denverton_ns: re-factor HSIO configuration	Julien Viard de Galbert
2017-09-05	soc/intel/denverton_ns: Add support for Intel Atom C3000 SoC	Mariusz Szafranski