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path: root/src/soc/intel/common
AgeCommit message (Expand)Author
2020-09-28soc/intel/common/../pmclib.h: Include <types.h>Angel Pons
2020-09-27soc/intel/common/block/acpi: Factor out common gpio_op.aslSubrata Banik
2020-09-24soc/intel/common/smbus: Add support for Apollo Lake SoCMaxim Polyakov
2020-09-22Revert "soc/intel: Refactor do_global_reset() function"Furquan Shaikh
2020-09-21soc/intel/common: Keep common non-IP code block inside basecodeSubrata Banik
2020-09-21src/soc/intel: Drop unneeded empty linesElyes HAOUAS
2020-09-21soc/intel: Refactor do_global_reset() functionSubrata Banik
2020-09-21soc/intel: rename get_prmrr_sizeMichael Niewöhner
2020-09-21soc/intel/common/block/sgx: drop no-ops from PRMRR KconfigMichael Niewöhner
2020-09-21soc/intel/common/block/sgx: make PRMRR size setting depend on SGXMichael Niewöhner
2020-09-21soc/intel/common/cse_lite: Defer cse_fw_sync for JSLKarthikeyan Ramasubramanian
2020-09-19soc/intel/common/block/cse: Refactor cse_request_global_reset() functionSubrata Banik
2020-09-17soc/intel/common/block/chip: Refactor chip_get_common_soc_structure()Subrata Banik
2020-09-17soc/intel/common/block: Add NULL check for 'ctx' pointerSubrata Banik
2020-09-16soc/intel/common/block: Do not die if PRMRR size unsupportedAngel Pons
2020-09-15soc/intel/common/block/cpu: Fix boot failurePatrick Rudolph
2020-09-15common/block/pmc: Add a check to program the PchPmPwrCycDurV Sowmya
2020-09-14soc/intel/common/block: Use pci_dev_request_bus_master for BM enablingSubrata Banik
2020-09-14soc/intel/common/cpu: Update COS mask calculation for NEM enhanced modeAamir Bohra
2020-09-12soc/intel/common/block/*/Kconfig: Guard options with if-blocksAngel Pons
2020-09-12include/console/uart: make index parameter unsignedFelix Held
2020-09-09soc/intel/common/block/imc: Drop unused codeAngel Pons
2020-09-09soc/intel/common/block/uart/Kconfig: Drop unused symbolsAngel Pons
2020-09-08pci_ids: Add Alder Lake DTT PCI IDsSubrata Banik
2020-09-08pci_ids: Add Alder Lake IPU PCI IDsSubrata Banik
2020-09-08soc/intel/common: Add SMRR Lock Supported bit definition for MTRR_CAPTim Wawrzynczak
2020-08-29PCI IDs: Add PCI ID for CML DPTF/DTT PCI deviceEdward O'Callaghan
2020-08-27soc/intel/common: Include Elkhart Lake SA IDsTan, Lean Sheng
2020-08-27soc/intel/common: Add Elkhart Lake B0 CPU IDTan, Lean Sheng
2020-08-24soc/intel/common: Add downgrade support for CSE FirmwareSridhar Siricilla
2020-08-21SMM: Validate more user-provided pointersPatrick Rudolph
2020-08-20cse_lite: Move global reset after MRC writebackCaveh Jalali
2020-08-18src: Remove unused 'include <delay.h>'Elyes HAOUAS
2020-08-18src: Remove unused 'include <lib.h>'Elyes HAOUAS
2020-08-18soc/intel/common/block/pmc/pmclib.c: Remove unused '<pc80/mc146818rtc.h>'Elyes HAOUAS
2020-08-18soc/intel/common: Add support for LPSS UART in ACPI modePatrick Rudolph
2020-08-17{soc/intel/common,sb/intel/lynxpoint}/hda_verb.c: Reduce differencesElyes HAOUAS
2020-08-17soc/intel/common: Move common HDA registers to <device/azalia_device.h>Elyes HAOUAS
2020-08-17soc/intel/jasperlake: Add IGD Device IDKrishna Prasad Bhat
2020-08-14soc/intel/common/cse_lite: Perform a board specific resetKarthikeyan Ramasubramanian
2020-08-13soc/intel/common/block: Stitch CSE blobs into FW_MAIN_X partitionsSridhar Siricilla
2020-08-12soc/intel/common/block/sata: Add common SATA driverSubrata Banik
2020-08-11soc/intel/common/block/gspi: Recalculate BAR after resource allocationJes Klinke
2020-08-07soc/intel/common: Log CSE FW Status Registers before triggering recoverySridhar Siricilla
2020-08-06soc/intel/common/block/cpu: Refactor init_cpus functionSubrata Banik
2020-08-05src/soc/intel/common: Make top_of_ram till TOLUD region mmio_resourceSubrata Banik
2020-08-05soc/intel/common: Include Alder Lake device IDsSubrata Banik
2020-08-03Change all assert(0) to BUG()Julius Werner
2020-07-30smbios: Fix type 17 for Windows 10Patrick Rudolph
2020-07-28src: Never set ISA Enable on PCI bridgesAngel Pons
2020-07-26soc/intel/common/basecode: Implement CSE update flowRizwan Qureshi
2020-07-26src/soc/intel: Add include <types.h>Elyes HAOUAS
2020-07-26soc/intel/common/gpio_defs: Remove PAD_CFG_NF_BUF_TRIGMaxim Polyakov
2020-07-26soc/intel/common/hda: Add HDA ID for Jasper Lakeyan.liu
2020-07-26src: Change BOOL CONFIG_ to CONFIG() in comments & stringsMartin Roth
2020-07-25soc/intel/tigerlake: Update Tiger Lake SA IDsDerek Huang
2020-07-24soc/intel/common/gpio_defs: Remove unused macro for NFMaxim Polyakov
2020-07-24soc/intel/common/gpio_defs: Undo set TxDRxE in GPI_TRIG_OWN()Maxim Polyakov
2020-07-24soc/intel/common/gpio_defs: Improve some GPI macrosMaxim Polyakov
2020-07-21src: Use ACPI macrosElyes HAOUAS
2020-07-20src: Report word-sized access for PM1a_EVTAngel Pons
2020-07-20src: Make HAVE_CF9_RESET set the FADT reset registerAngel Pons
2020-07-20src: Drop useless cache flush settings in FADTAngel Pons
2020-07-20src: Never overwrite `fadt->flags`Angel Pons
2020-07-20src: Drop useless PM1b settings from FADTAngel Pons
2020-07-20src: Drop useless GPE1 settings from FADTAngel Pons
2020-07-19soc/intel/common/gpio_defs: Fix coding styleMaxim Polyakov
2020-07-16soc/intel/common/block/pmc: Select PMC on mainboard basisTim Chu
2020-07-15PCI IDs: Add PCI ID for JSL DPTF/DTT PCI deviceTim Wawrzynczak
2020-07-14src: Remove unused 'include <cpu/x86/msr.h>'Elyes HAOUAS
2020-07-14src: Remove unused 'include <stdint.h>Elyes HAOUAS
2020-07-14src: Remove unused 'include <types.h>'Elyes HAOUAS
2020-07-12soc/intel/gpio: Convert PAD_CFG0_ROUTE_* to PAD_IRQ_ROUTE()Maxim Polyakov
2020-07-12soc/intel/gpio: Convert PAD_CFG0_RX_POL_* to PAD_RX_POL()Maxim Polyakov
2020-07-12intel/gpio: Convert PAD_CFG0_TRIG_* to PAD_TRIG()Maxim Polyakov
2020-07-12soc/intel/common/block/pcie: Select ASPM on mainboard basisChristian Walter
2020-07-12soc/intel/tigerlake: Add new IGD deviceRavi Sarawadi
2020-07-07soc/intel/common/block: Add new block DTTTim Wawrzynczak
2020-07-07soc/intel/common: Add a minimal PCI driver for IPUTim Wawrzynczak
2020-07-03soc/intel/common: Only touch Time Window Tau bits in supported SoCsTim Wawrzynczak
2020-07-01soc/intel/tigerlake: Switch to CSE Lite RW at BS_DEV_INIT_CHIPS entryJamie Ryu
2020-07-01soc/intel/common/cpu: Don't set any TCC settings if offset is 0Tim Wawrzynczak
2020-07-01ACPI GNVS: Replace uses of smm_get_gnvs()Kyösti Mälkki
2020-06-30ACPI: Drop typedef global_nvs_tKyösti Mälkki
2020-06-30src: Remove whitespaces before tabsElyes HAOUAS
2020-06-28soc/intel/common: add TCC activation functionalitySumeet R Pawnikar
2020-06-25drivers/intel/fsp2_0: decouple FSP_PEIM_TO_PEIM_INTERFACE from FSP 2.1Jonathan Zhang
2020-06-24src: Report byte-sized access for GPE0Angel Pons
2020-06-24ACPI: Replace smm_setup_structures()Kyösti Mälkki
2020-06-24ACPI: Replace uses of CBMEM_ID_ACPI_GNVSKyösti Mälkki
2020-06-22device/smbus_host: Declare common early SMBus prototypesKyösti Mälkki
2020-06-19soc/intel/common/acpi: rename dptf.asl to dptf_common.asl fileSumeet R Pawnikar
2020-06-18soc/intel/common: make dptf acpi device ids configurableSumeet R Pawnikar
2020-06-18soc/intel/common: Introduce ASL2.0 syntaxAlexey Buyanov
2020-06-16cpu/x86: Define MTRR_CAP_PRMRRKyösti Mälkki
2020-06-16soc/intel/common: Replace smm_soutbridge_enable(SMI_FLAGS)Kyösti Mälkki
2020-06-16sb/intel: Remove spurious HAVE_SMI_HANDLER testKyösti Mälkki
2020-06-16arch/x86: Create helper for APM_CNT SMI triggersKyösti Mälkki
2020-06-15arch/x86: Remove NO_FIXED_XIP_ROM_SIZEKyösti Mälkki
2020-06-13soc/intel/common: Introduce ASL2.0 syntaxAlexey Buyanov