| Age | Commit message (Expand) | Author |
|---|---|---|
| 2017-03-15 | soc/intel/common: Wrap lines at 80 columns | Lee Leahy |
| 2016-12-02 | soc/intel/common: Add suppport for Extended VBT | Abhay Kumar |
| 2016-07-31 | src/soc: Capitalize CPU, ACPI, RAM and ROM | Elyes HAOUAS |
| 2016-07-31 | Remove extra newlines from the end of all coreboot files. | Martin Roth |
| 2016-05-18 | soc/intel/common: Add IGD OpRegion support | Andrey Petrov |
| 2015-10-27 | FSP 1.1: Move common FSP code | Lee Leahy |
| 2015-10-27 | fsp/intel common: Add support for Gfx PEIM (AKA GOP) | robbie zhang |
| 2015-06-24 | Intel/common: Remove copyright address | Lee Leahy |
| 2015-06-24 | Intel Common SOC: Add romstage support | Lee Leahy |
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index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |