coreboot.git - my copy of coreboot

Age	Commit message (Collapse)	Author
2020-03-18	soc: Remove copyright notices	Patrick Georgi
	They're listed in AUTHORS and often incorrect anyway, for example: - What's a "Copyright $year-present"? - Which incarnation of Google (Inc, LLC, ...) is the current copyright holder? - People sometimes have their editor auto-add themselves to files even though they only deleted stuff - Or they let the editor automatically update the copyright year, because why not? - Who is the copyright holder "The coreboot project Authors"? - Or "Generated Code"? Sidestep all these issues by simply not putting these notices in individual files, let's list all copyright holders in AUTHORS instead and use the git history to deal with the rest. Change-Id: I4c110f60b764c97fab2a29f6f04680196f156da5 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39610 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: David Hendricks <david.hendricks@gmail.com>
2020-02-26	treewide: capitalize 'USB'	Elyes HAOUAS
	Change-Id: I7650786ea50465a4c2d11de948fdb81f4e509772 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39100 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-03-28	soc/intel/common: Move support to log XHCI wake events	Karthikeyan Ramasubramanian
	The policy to identify and log the XHCI wake events is similar between skylake and apollolake. Hence move the similar parts to a common location. BUG=b:123429132 BRANCH=None TEST=Ensure that the system boots to ChromeOS. Ensure that the wake up events due to USB are logged into the event logs. 6 \| 2019-03-21 09:22:18 \| S0ix Enter 7 \| 2019-03-21 09:22:22 \| S0ix Exit 8 \| 2019-03-21 09:22:22 \| Wake Source \| PME - XHCI (USB 2.0 port) \| 9 9 \| 2019-03-21 09:22:22 \| Wake Source \| GPE # \| 13 10 \| 2019-03-21 09:23:20 \| ACPI Enter \| S3 11 \| 2019-03-21 09:23:30 \| Wake Source \| PME - XHCI (USB 2.0 port) \| 9 12 \| 2019-03-21 09:23:30 \| ACPI Wake \| S3 13 \| 2019-03-21 09:23:30 \| Wake Source \| GPE # \| 13 Change-Id: Ia6643342e3292984e422ff3c3fcd4bc0d99f947e Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31999 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>