| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2017-04-11 | soc/intel/common/block: Add Intel common UART code | Aamir Bohra | |
| Create Intel Common UART driver code. This code does below UART configuration for bootblock phase. * Program BAR * Configure reset register * Configure clock register Change-Id: I3843fac88cfb7bbb405be50d69f555b274f0d72a Signed-off-by: Aamir Bohra <aamir.bohra@intel.com> Reviewed-on: https://review.coreboot.org/18952 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> | |||
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index : coreboot.git | |
| my copy of coreboot | gitea |
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