| Age | Commit message (Expand) | Author |
|---|---|---|
| 2019-09-15 | src/soc: Remove unused include <device/pci_ops.h> | Elyes HAOUAS |
| 2019-09-06 | soc/intel/skylake: Add Lewisburg family PCH support | Maxim Polyakov |
| 2019-03-04 | arch/io.h: Add missing includes | Kyösti Mälkki |
| 2019-02-26 | soc/intel/common: Include cometlake PCH IDs | Ronak Kanabar |
| 2019-01-23 | soc/{amd,intel}: Remove needless '&' on function pointers | Elyes HAOUAS |
| 2018-11-07 | soc/intel/common: Include Icelake device IDs | Aamir Bohra |
| 2018-09-18 | soc/intel/common/block: Don't use device_t in ramstage | Elyes HAOUAS |
| 2018-02-07 | soc/intel/skylake: Add Kabylake PCH H device ID's | V Sowmya |
| 2017-12-13 | soc/intel/common/block: Add option to have subsystem_id in common pci driver | Subrata Banik |
| 2017-08-21 | soc/intel/common/smbus: Don't clear random bits | Nico Huber |
| 2017-08-04 | soc/intel/common: Add Cannonlake pci ids for common | Lijian Zhao |
| 2017-05-08 | soc/intel/common/block: Add Intel common SMBus code | Aamir Bohra |
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index : coreboot.git | |
| my copy of coreboot | gitea |
| aboutsummaryrefslogtreecommitdiff |