coreboot.git - my copy of coreboot

Age	Commit message (Collapse)	Author
2017-10-20	intel/common/block/sgx: Add API to enumerate SGX resources and update GNVS	Pratik Prajapati
	Intel SDM: Table 36-6. CPUID Leaf 12H, Sub-Leaf Index 2 is called to enumerate SGX resources. Change-Id: I62f3fd8527e27040336c52bc78768035f4b7e5a9 Signed-off-by: Pratik Prajapati <pratikkumar.v.prajapati@intel.com> Reviewed-on: https://review.coreboot.org/21966 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-09-15	soc/intel/common/sgx: use SOC specific API to get PRMRR base and mask	Pratik Prajapati
	Use soc_get_uncore_prmmr_base_and_mask() API to get PRMRR base and mask. Change-Id: I2fd96607c4f5fed97e38087b60d47d6daacc7646 Signed-off-by: Pratik Prajapati <pratikkumar.v.prajapati@intel.com> Reviewed-on: https://review.coreboot.org/21246 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2017-09-15	soc/intel/common/sgx: Define and use soc_fill_sgx_param()	Pratik Prajapati
	To remove chip.h dependency from SGX common code - Create API soc_fill_sgx_param() and use it in sgx.c - Implement same API for skylake/kabylake - define sgx_param structure Also include intelblocks/sgx.h instead of soc/msr.h Change-Id: I358f0817bec5dd6cd147a645675b5688969a04e0 Signed-off-by: Pratik Prajapati <pratikkumar.v.prajapati@intel.com> Reviewed-on: https://review.coreboot.org/21528 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-09-07	soc/intel/common/sgx: Fix null pointer dereference warning from klocwork	Pratik Prajapati
	Fix the warnings of klocwork scan. e.g. "Pointer 'dev' checked for NULL at line 158 will be dereferenced at line 159" Change-Id: I6cc9c68652b074c666c86456183460ca38a886ed Signed-off-by: Pratik Prajapati <pratikkumar.v.prajapati@intel.com> Reviewed-on: https://review.coreboot.org/21408 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-08-21	intel/common/block/sgx: Refactor SGX common code	Pratik Prajapati
	To correct the SGX init sequence; PRMRR on all cores first needs to be set, then follow the SGX init sequence. This patch would refactor the common SGX code (and add needed checks in the init sequence) so that SOC specific code can call SGX init in correct order. Change-Id: Ic2fb00edbf6e98de17c12145c6f38eacd99399ad Signed-off-by: Pratik Prajapati <pratikkumar.v.prajapati@intel.com> Reviewed-on: https://review.coreboot.org/21006 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-08-21	intel/common/sgx: Use intel_mp_current_microcode() to get microcode pointer	Pratik Prajapati
	Get microcode patch pointer from intel_mp_current_microcode() api of mp_init and change sgx_configure function signature to drop microcode_patch param. Change-Id: I9196c30ec7ea52d7184a96b33835def197e2c799 Signed-off-by: Pratik Prajapati <pratikkumar.v.prajapati@intel.com> Reviewed-on: https://review.coreboot.org/21009 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2017-07-10	sgx: Move SGX code to intel/common/block	Pratik Prajapati
	CONFIG_SOC_INTEL_COMMON_BLOCK_SGX controls building. The SGX feature is still enabled from devicetree.cb. As of now this SGX init supports only KBL (SKL not tested). Support of SGX for new SOCs would be added incrementally in this common code base. Change-Id: I0fbba364b7342e686a2287ea1a910ef9a4eed595 Signed-off-by: Pratik Prajapati <pratikkumar.v.prajapati@intel.com> Reviewed-on: https://review.coreboot.org/20173 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>