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path: root/src/soc/intel/common/block/pmc/pmclib.c
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2017-10-05soc/intel/common/block: Manage power state variable from common PMC blockShaunak Saha
This patch helps managing power state variables from within the library. Adds migrate_power_state which migrates the chipset power state variable, reads global power variable and adds it in cbmem for future use. This also adds get_soc_power_state_values function which returns the power state variable from cbmem or global power state variable if cbmem is not populated yet. Change-Id: If65341c1492e3a35a1a927100e0d893f923b9e68 Signed-off-by: Shaunak Saha <shaunak.saha@intel.com> Reviewed-on: https://review.coreboot.org/21851 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-10-02soc/intel/common/block: Move power button SMI functions to common PMC blockShaunak Saha
This patch moves the functions update_pm1_enable and read_pm1_enable to common block PMC. We rename the functions to pmc_update_pm1_enable and pmc_read_pm1_enable to keep semantics consistent. Change-Id: I9a73a6348fc22367ee2e68bf2c31823ebfefc525 Signed-off-by: Shaunak Saha <shaunak.saha@intel.com> Reviewed-on: https://review.coreboot.org/21755 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-08-08soc/intel/common/block: Add Intel PMC supportShaunak Saha
PMC util code is very similar accross different intel SOC's. This patch is an effort to move those code in common place so that it can be shared accross different intel platforms instead of duplicating for each platform. This patch adds pmclib.c file which contains the pmc utility functions common accross SOC's. The config for common PMC is SOC_INTEL_COMMON_BLOCK_PMC which can be defined in SOC's Kconfig file in order to use the common PMC util code. Change-Id: Ic3d96fc23a98c30e8ea0969a7be09d217eeaa889 Signed-off-by: Shaunak Saha <shaunak.saha@intel.com> Reviewed-on: https://review.coreboot.org/19349 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>