| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2017-05-16 | soc/intel/common: Add sanity check of PCR_BASE_ADDRESS | Lijian Zhao | |
| PCR_BASE_ADRESS may be zero if SOC Kconfig didn't define the non zero default value. TEST=Remove the PCR_BASE_ADDRESS config in Apollolake Kconfig file and build. BUG=None Change-Id: I396aa1a3e89507c90e17229a986de5d2c0887c9c Signed-off-by: Lijian Zhao <lijian.zhao@intel.com> Reviewed-on: https://review.coreboot.org/19684 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org> | |||
| 2017-04-10 | soc/intel/common/block: Add Intel common PCR support | Subrata Banik | |
| IOSF_SB message space is used to access registers mapped on IOSF-SB. These registers include uncore CRs (configuration registers) and chipset specific registers. The Private Configuration Register (PCR) space is accessed on IOSF-SB using destination ID also known as Port ID. Access to IOSF-SB by the Host or System Agent is possible over PSF via the Primary to Sideband Bridge (P2SB). P2SB will forward properly formatted register access requests as CRRd and CRWr request via IOSF-SB. Change-Id: I78526a86b6d10f226570c08050327557e0bb2c78 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/18669 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> | |||
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