coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2018-11-07	soc/intel/common: Include Icelake device IDs	Aamir Bohra
2018-10-17	soc/intel/cannonlake: Add new cannon lake PCH-H support	praveen hodagatta pranesh
2018-10-08	Move compiler.h to commonlib	Nico Huber
2018-09-18	soc/intel/common/block: Don't use device_t in ramstage	Elyes HAOUAS
2018-04-24	compiler.h: add __weak macro	Aaron Durbin
2018-03-26	soc/intel: Add KBL-S MCH and some KBL PCH support	Gaggery Tsai
2018-02-07	soc/intel/skylake: Add Kabylake PCH H device ID's	V Sowmya
2018-01-25	soc/intel/skylake: Clean up the skylake PCH H device ID macros	V Sowmya
2018-01-17	soc/intel/common: Add option to pass SoC IO resource	Subrata Banik
2017-12-13	soc/intel/common/block: Add option to have subsystem_id in common pci driver	Subrata Banik
2017-12-07	soc/intel/apollolake: add ability to enable eSPI	Bora Guvendik
2017-09-27	soc/intel/common: Add Cannonlake PCI id	Lijian Zhao
2017-09-22	soc/intel/skylake: add Kabylake Celeron base SKU	Gaggery Tsai
2017-09-19	soc/intel/common/block: Add pci device id for CNL-Y	Bora Guvendik
2017-09-08	soc/intel/common/block: Common ACPI	Shaunak Saha
2017-08-15	soc/intel/common/block: Add LPC Common code and use it for APL	Ravi Sarawadi