| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2017-07-26 | intel/common/block/itss: Extend itss_irq_init() to handle IOSF 1.0 | Werner Zeh | |
| Current implementation of itss_irq_init() uses 8 bit write access to IRQ routing registers which is not supported on Apollo Lake. This commit moves the register access from 8 bit to 32 bit so that this function can be used with every platform. Change-Id: I15c3c33a16329fd57f0ad7f99d720adbf300d094 Signed-off-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-on: https://review.coreboot.org/20680 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> | |||
| 2017-04-28 | soc/intel/common/block: Add Intel common ITSS code support | Barnali Sarkar | |
| Create Intel Common ITSS code. This code currently only contains the code for Interrupt initialization required in Bootblock phase. More code will get added up in the subsequent phases. Change-Id: I133294188eb5d1312caeafcb621fb650a7fab371 Signed-off-by: Barnali Sarkar <barnali.sarkar@intel.com> Signed-off-by: Bora Guvendik <bora.guvendik@intel.com> Reviewed-on: https://review.coreboot.org/19125 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> | |||
 |
index : coreboot.git | |
| my copy of coreboot | gitea |
| aboutsummaryrefslogtreecommitdiff |