coreboot.git - my copy of coreboot

Age	Commit message (Collapse)	Author
2017-06-23	soc/intel/common/block: Add common MP Init code	Barnali Sarkar
	This patch contains State Machine callbacks init_cpus() and post_cpu_init(). Also, it has the SOC call for CPU feature programming. Change-Id: I5b20d413c85bf7ec6ed89b4cdf1770c33507236b Signed-off-by: Barnali Sarkar <barnali.sarkar@intel.com> Reviewed-on: https://review.coreboot.org/20189 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-06-09	soc/intel/common/block: Add Intel common CPU library code	Barnali Sarkar
	Create Intel Common CPU library code which provides various CPU related APIs. This patch adds cpulib.c file which contains various helper functions to address different CPU functionalities like - cpu_set_max_ratio(), cpu_get_flex_ratio(), cpu_set_flex_ratio(), cpu_get_tdp_nominal_ratio(), cpu_config_tdp_levels(), cpu_set_p_state_to_turbo_ratio(), cpu_set_p_state_to_nominal_tdp_ratio(), cpu_set_p_state_to_max_non_turbo_ratio(), cpu_get_burst_mode_state(), cpu_enable_burst_mode(), cpu_disable_burst_mode(), cpu_enable_eist(), cpu_disable_eist(), cpu_enable_untrusted_mode() Change-Id: I2f80c42132d9ea738be4051d2395e9e51ac153f8 Signed-off-by: Barnali Sarkar <barnali.sarkar@intel.com> Reviewed-on: https://review.coreboot.org/19540 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Subrata Banik <subrata.banik@intel.com>
2017-03-28	soc/intel/common/block: Add cache as ram init and teardown code	Subrata Banik
	Create sample model for common car init and teardown programming. TEST=Booted Reef, KCRD/EVE, GLKRVP with CAR_CQOS, CAR_NEM_ENHANCED and CAR_NEM configs till post code 0x2a. Change-Id: Iffd0c3e3ca81a3d283d5f1da115222a222e6b157 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/18381 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>