| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2017-03-28 | soc/intel/common/block: Add cache as ram init and teardown code | Subrata Banik | |
| Create sample model for common car init and teardown programming. TEST=Booted Reef, KCRD/EVE, GLKRVP with CAR_CQOS, CAR_NEM_ENHANCED and CAR_NEM configs till post code 0x2a. Change-Id: Iffd0c3e3ca81a3d283d5f1da115222a222e6b157 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/18381 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com> | |||
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index : coreboot.git | |
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