| Age | Commit message (Expand) | Author |
|---|---|---|
| 2015-10-27 | FSP 1.1: Move common FSP code | Lee Leahy |
| 2015-10-11 | skylake: add support for verstage | Aaron Durbin |
| 2015-09-17 | intel/common: Add common code for filling out ACPI _SWS | Duncan Laurie |
| 2015-08-29 | soc/intel/common: Add mrc.cache file to CBFS when appropriate | Alexandru Gagniuc |
| 2015-08-14 | intel/common: fix stage_cache_external_region() | Aaron Durbin |
| 2015-06-24 | Intel Common SOC: Add romstage support | Lee Leahy |
| 2015-04-30 | kbuild: Don't require intel/common changes for every soc | Stefan Reinauer |
| 2015-04-29 | kbuild: automatically include SOCs | Stefan Reinauer |
| 2015-04-18 | soc/intel/common: Add common reset code | Lee Leahy |
| 2014-10-22 | baytrail: Move HDA verb table to Intel SOC common directory | Duncan Laurie |
| 2014-10-22 | baytrail: Move MRC cache code to a common directory | Duncan Laurie |
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index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |