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path: root/src/soc/intel/cannonlake
AgeCommit message (Expand)Author
2019-02-28soc/intel/cannonlake: Disable ACPI mode on BS_DEV_INIT exitFurquan Shaikh
2019-02-28soc/intel/cannonlake: Add PCH series check for CML LP PCHMaulik V Vaghela
2019-02-28soc/intel/cannonlake: Add Comet Lake U SA 2+2 Device IDSubrata Banik
2019-02-27soc/intel/cannonlake: Add a config for configuring SD_VDD1_PWR_EN#Rizwan Qureshi
2019-02-27soc/intel/cannonlake: Add ASL functions to manipulate RX/TX buffersRizwan Qureshi
2019-02-27soc/intel/cannonlake: Disable ACPI mode as part of pmc_soc_initFurquan Shaikh
2019-02-26soc/intel/cannonlake: Update GPIO definitions for Virtual GPIORizwan Qureshi
2019-02-26soc/intel/common: Include cometlake PCH IDsRonak Kanabar
2019-02-24soc/intel/common: Include cometlake SA IDsRonak Kanabar
2019-02-24soc/intel/common: Include cometlake CPU IDsRonak Kanabar
2019-02-23soc/intel/cannonlake: Make few more whitespace proper in MCH nameSubrata Banik
2019-02-22soc/intel/cannonlake: Add support for setting FSP-S PcieRpHotPlug from device...Jeremy Soller
2019-02-22soc/intel/cannonlake: Add ASL function for setting pad modeRizwan Qureshi
2019-02-22soc/intel/cannonlake: Add whitespace proper in CPU/MCH/IGD nameSubrata Banik
2019-02-21soc/intel/cannonlake: SoC specific microcode update checkRonak Kanabar
2019-02-21soc/intel/cannonlake: Add field to identify single channel memoryShelley Chen
2019-02-21src/soc/intel/cannonlake: Add PsysPmax settingGaggery Tsai
2019-02-20src/soc/intel/cannonlake: Add _DSM methods for LPIT tableLijian Zhao
2019-02-19soc/intel/common: Add whiskeylake celeron v-0 supportLijian Zhao
2019-02-18soc/intel: Add mem_rank info in SMBIOSFrancois Toguo
2019-02-15soc/intel/cannonlake: Define VR settingsRoy Mingi Park
2019-02-13soc/intel/cannonlake: Configure serial debug uartRonak Kanabar
2019-02-13soc/intel/cannonlake: Don't use CAR_GLOBALArthur Heymans
2019-02-07soc/intel/cannonlake: Configure GPIOs again after FSP-S is doneFurquan Shaikh
2019-02-07soc/intel/cannonlake: Add Whiskeylake SoC kconfigSubrata Banik
2019-02-04soc/intel/cannonlake: Remove SOC_INTEL_CANNONLAKE_MEMCFG_INIT KconfigSubrata Banik
2019-01-31soc/intel/cannonlake: Make correct C-state entries for S0ix and non-S0ixRonak Kanabar
2019-01-28src/soc/intel/cnl/chip.h: Fix preprocessor conditionAngel Pons
2019-01-25soc/intel/cannonlake: Export function to set After G3 stateDuncan Laurie
2019-01-25soc/intel/cannonlake: Disable CpuRatio and SaGv in recoveryDuncan Laurie
2019-01-23soc/intel/cannonlake: Replace device name B0D4 with TCPUSumeet Pawnikar
2019-01-17soc/intel/cannonlake: drop extra newlinePatrick Georgi
2019-01-17soc/intel/cannonlake: Change in SaGv optionsRonak Kanabar
2019-01-16soc/intel/cannonlake: Fix afterg3 programmingLijian Zhao
2019-01-16soc/intel/cannonlake: Access conf pointer only if its not nullPratik Prajapati
2019-01-16soc/intel/cannonlake: Add processor power limits control supportSumeet Pawnikar
2019-01-16buildsystem: Promote rules.h to default includeKyösti Mälkki
2019-01-14soc/intel/cannonlake: Provide interface to update TCC offsetJohn Su
2019-01-12soc/intel/cannonlake: Hook up MicrocodeLijian Zhao
2019-01-10soc/intel/cannonlake: complete rename of TCO2_STS_SECOND_TOPatrick Georgi
2019-01-10soc/intel/common/block: Move tco common functions into block/smbusSubrata Banik
2019-01-10Untangle CBFS microcode updatesNico Huber
2019-01-09soc/intel: Clean mess around UART_DEBUGNico Huber
2019-01-09soc/intel/cannonlake: Enable/Disable IPU based on devicetree switchV Sowmya
2019-01-08soc/intel/cannonlake: Add FSP UPD for minimum assertion widthDuncan Laurie
2019-01-08soc/intel/cannonlake: Add chipset event loggingDuncan Laurie
2019-01-08soc/intel/cannonlake: Fix chipset_power_state structureDuncan Laurie
2019-01-07soc/intel: Standardize names of common MSRsElyes HAOUAS
2019-01-06soc/intel: Drop pmc_get_mainboard_power_failure_state_choice()Nico Huber
2019-01-03soc/intel/cannonlake: Add cannonlake ACPI GPIO opLijian Zhao
2019-01-01soc/intel/cannonlake: Enable CNVi based on devicetreeMaulik V Vaghela
2018-12-19soc/intel/cannonlake: SATA and DMI power optimizeLijian Zhao
2018-12-19soc/intel/cannonlake: Auto turn on HDA controllerLijian Zhao
2018-12-19soc/intel/cannonlake: Declare SATA Mode clearLijian Zhao
2018-12-19soc/intel/cannonlake: Enable CPU flexible ratioLijian Zhao
2018-12-19soc/intel/cannonlake: Amend comment typoLijian Zhao
2018-12-19soc: Remove useless include <device/pci_ids.h>Elyes HAOUAS
2018-12-19soc/intel/cannonlake: Add Acoustic featuresLijian Zhao
2018-12-14soc/intel/cannonlake: Fix CNL-H GPIO pin mapDuncan Laurie
2018-12-14soc/intel/cannonlake: Add GPIO group pad base for ACPIDuncan Laurie
2018-12-13cpuid: Add helper function for cpuid(1) functionsSubrata Banik
2018-12-10soc/intel/cannonlake: Fix GPIO reportingDuncan Laurie
2018-12-07soc/intel/cannonlake: Fix I2C clock inputDuncan Laurie
2018-12-04soc/intel/cannonlake: Add USB device namesDuncan Laurie
2018-12-04soc/intel/cannonlake: Increase bootblock sizeDuncan Laurie
2018-12-04soc/intel/cannonlake: Add DPTF ACPI codeDuncan Laurie
2018-12-03soc/intel/cannonlake: Load FSP teardown optionallyLijian Zhao
2018-11-30cpu/intel/common: Use a common acpi/cpu.asl fileArthur Heymans
2018-11-30soc/intel/common: Rework acpi/cpu.aslArthur Heymans
2018-11-27soc/intel/cannonlake: Delete unused macros in lpc.hSubrata Banik
2018-11-21soc/intel/cannonlake: Fix IO decode setupDuncan Laurie
2018-11-18soc/intel/{cnl, icl}: Remove unnecessary __SIMPLE_DEVICE__ checkSubrata Banik
2018-11-17soc/intel/cannonlake: Add options for pcie ltrLijian Zhao
2018-11-16src: Remove unneeded include <cbmem.h>Elyes HAOUAS
2018-11-16src: Remove unneeded include <console/console.h>Elyes HAOUAS
2018-11-16src: Get rid of duplicated includesElyes HAOUAS
2018-11-15soc/intel/cannonlake: Make static IRQ mapping for PIC modeSubrata Banik
2018-11-15soc/intel/cannonlake: Make static IRQ mapping for CNP PCH pci devicesSubrata Banik
2018-11-13soc/intel/cannonlake: Remove SmbusEnableDuncan Laurie
2018-11-12src: Remove unneeded include "{arch,cpu}/cpu.h"Elyes HAOUAS
2018-11-07mb/{intel/google}: Move CNVi ASL entry from static DSDT to dynamic SSDT gener...Subrata Banik
2018-11-05soc/intel/cannonlake: Enable ISH from deviceLijian Zhao
2018-11-05soc/intel/cannonlake: Remove depreciated UPD selectionLijian Zhao
2018-11-05src: Remove unneeded include <arch/ioapic.h>Elyes HAOUAS
2018-11-02soc/intel: Enable GPIO functions in verstageDuncan Laurie
2018-11-01src: Add missing include <stdint.h>Elyes HAOUAS
2018-10-30src: Add missing include <stdint.h>Elyes HAOUAS
2018-10-27soc/intel/*: Make FSP header path user configurablePatrick Georgi
2018-10-26soc/intel/cannonlake: Add back PM TIMER EMULATIONLijian Zhao
2018-10-25soc/intel: Consolidate FSP CAR setup and teardown codePraveen hodagatta pranesh
2018-10-25soc/intel/cannonlake: Enable S4 sleep state supportpraveen hodagatta pranesh
2018-10-22intel: Use CF9 reset (part 2)Patrick Rudolph
2018-10-19soc/intel/cannonlake: Enable HDA driver supportpraveen hodagatta pranesh
2018-10-17soc/intel/cannonlake: Add CNP PCH-H gpio pin definitionspraveen hodagatta pranesh
2018-10-17soc/intel/cannonlake: Add new cannon lake PCH-H supportpraveen hodagatta pranesh
2018-10-12drivers/intel/fsp2_0: Hook up IntelFSP repoPatrick Georgi
2018-10-11src: Move common IA-32 MSRs to <cpu/x86/msr.h>Elyes HAOUAS
2018-10-09soc/intel/cannonlake: Add PCIE ASL entrySubrata Banik
2018-10-09soc/intel/cannonlake: Make correct IRQ mapping for CNL SA and PCH PCI devicesSubrata Banik
2018-10-09soc/intel/cannonlake: Disable Legacy PME for Root portsSubrata Banik