coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2019-02-28	soc/intel/cannonlake: Disable ACPI mode on BS_DEV_INIT exit	Furquan Shaikh
2019-02-28	soc/intel/cannonlake: Add PCH series check for CML LP PCH	Maulik V Vaghela
2019-02-28	soc/intel/cannonlake: Add Comet Lake U SA 2+2 Device ID	Subrata Banik
2019-02-27	soc/intel/cannonlake: Add a config for configuring SD_VDD1_PWR_EN#	Rizwan Qureshi
2019-02-27	soc/intel/cannonlake: Add ASL functions to manipulate RX/TX buffers	Rizwan Qureshi
2019-02-27	soc/intel/cannonlake: Disable ACPI mode as part of pmc_soc_init	Furquan Shaikh
2019-02-26	soc/intel/cannonlake: Update GPIO definitions for Virtual GPIO	Rizwan Qureshi
2019-02-26	soc/intel/common: Include cometlake PCH IDs	Ronak Kanabar
2019-02-24	soc/intel/common: Include cometlake SA IDs	Ronak Kanabar
2019-02-24	soc/intel/common: Include cometlake CPU IDs	Ronak Kanabar
2019-02-23	soc/intel/cannonlake: Make few more whitespace proper in MCH name	Subrata Banik
2019-02-22	soc/intel/cannonlake: Add support for setting FSP-S PcieRpHotPlug from device...	Jeremy Soller
2019-02-22	soc/intel/cannonlake: Add ASL function for setting pad mode	Rizwan Qureshi
2019-02-22	soc/intel/cannonlake: Add whitespace proper in CPU/MCH/IGD name	Subrata Banik
2019-02-21	soc/intel/cannonlake: SoC specific microcode update check	Ronak Kanabar
2019-02-21	soc/intel/cannonlake: Add field to identify single channel memory	Shelley Chen
2019-02-21	src/soc/intel/cannonlake: Add PsysPmax setting	Gaggery Tsai
2019-02-20	src/soc/intel/cannonlake: Add _DSM methods for LPIT table	Lijian Zhao
2019-02-19	soc/intel/common: Add whiskeylake celeron v-0 support	Lijian Zhao
2019-02-18	soc/intel: Add mem_rank info in SMBIOS	Francois Toguo
2019-02-15	soc/intel/cannonlake: Define VR settings	Roy Mingi Park
2019-02-13	soc/intel/cannonlake: Configure serial debug uart	Ronak Kanabar
2019-02-13	soc/intel/cannonlake: Don't use CAR_GLOBAL	Arthur Heymans
2019-02-07	soc/intel/cannonlake: Configure GPIOs again after FSP-S is done	Furquan Shaikh
2019-02-07	soc/intel/cannonlake: Add Whiskeylake SoC kconfig	Subrata Banik
2019-02-04	soc/intel/cannonlake: Remove SOC_INTEL_CANNONLAKE_MEMCFG_INIT Kconfig	Subrata Banik
2019-01-31	soc/intel/cannonlake: Make correct C-state entries for S0ix and non-S0ix	Ronak Kanabar
2019-01-28	src/soc/intel/cnl/chip.h: Fix preprocessor condition	Angel Pons
2019-01-25	soc/intel/cannonlake: Export function to set After G3 state	Duncan Laurie
2019-01-25	soc/intel/cannonlake: Disable CpuRatio and SaGv in recovery	Duncan Laurie
2019-01-23	soc/intel/cannonlake: Replace device name B0D4 with TCPU	Sumeet Pawnikar
2019-01-17	soc/intel/cannonlake: drop extra newline	Patrick Georgi
2019-01-17	soc/intel/cannonlake: Change in SaGv options	Ronak Kanabar
2019-01-16	soc/intel/cannonlake: Fix afterg3 programming	Lijian Zhao
2019-01-16	soc/intel/cannonlake: Access conf pointer only if its not null	Pratik Prajapati
2019-01-16	soc/intel/cannonlake: Add processor power limits control support	Sumeet Pawnikar
2019-01-16	buildsystem: Promote rules.h to default include	Kyösti Mälkki
2019-01-14	soc/intel/cannonlake: Provide interface to update TCC offset	John Su
2019-01-12	soc/intel/cannonlake: Hook up Microcode	Lijian Zhao
2019-01-10	soc/intel/cannonlake: complete rename of TCO2_STS_SECOND_TO	Patrick Georgi
2019-01-10	soc/intel/common/block: Move tco common functions into block/smbus	Subrata Banik
2019-01-10	Untangle CBFS microcode updates	Nico Huber
2019-01-09	soc/intel: Clean mess around UART_DEBUG	Nico Huber
2019-01-09	soc/intel/cannonlake: Enable/Disable IPU based on devicetree switch	V Sowmya
2019-01-08	soc/intel/cannonlake: Add FSP UPD for minimum assertion width	Duncan Laurie
2019-01-08	soc/intel/cannonlake: Add chipset event logging	Duncan Laurie
2019-01-08	soc/intel/cannonlake: Fix chipset_power_state structure	Duncan Laurie
2019-01-07	soc/intel: Standardize names of common MSRs	Elyes HAOUAS
2019-01-06	soc/intel: Drop pmc_get_mainboard_power_failure_state_choice()	Nico Huber
2019-01-03	soc/intel/cannonlake: Add cannonlake ACPI GPIO op	Lijian Zhao
2019-01-01	soc/intel/cannonlake: Enable CNVi based on devicetree	Maulik V Vaghela
2018-12-19	soc/intel/cannonlake: SATA and DMI power optimize	Lijian Zhao
2018-12-19	soc/intel/cannonlake: Auto turn on HDA controller	Lijian Zhao
2018-12-19	soc/intel/cannonlake: Declare SATA Mode clear	Lijian Zhao
2018-12-19	soc/intel/cannonlake: Enable CPU flexible ratio	Lijian Zhao
2018-12-19	soc/intel/cannonlake: Amend comment typo	Lijian Zhao
2018-12-19	soc: Remove useless include <device/pci_ids.h>	Elyes HAOUAS
2018-12-19	soc/intel/cannonlake: Add Acoustic features	Lijian Zhao
2018-12-14	soc/intel/cannonlake: Fix CNL-H GPIO pin map	Duncan Laurie
2018-12-14	soc/intel/cannonlake: Add GPIO group pad base for ACPI	Duncan Laurie
2018-12-13	cpuid: Add helper function for cpuid(1) functions	Subrata Banik
2018-12-10	soc/intel/cannonlake: Fix GPIO reporting	Duncan Laurie
2018-12-07	soc/intel/cannonlake: Fix I2C clock input	Duncan Laurie
2018-12-04	soc/intel/cannonlake: Add USB device names	Duncan Laurie
2018-12-04	soc/intel/cannonlake: Increase bootblock size	Duncan Laurie
2018-12-04	soc/intel/cannonlake: Add DPTF ACPI code	Duncan Laurie
2018-12-03	soc/intel/cannonlake: Load FSP teardown optionally	Lijian Zhao
2018-11-30	cpu/intel/common: Use a common acpi/cpu.asl file	Arthur Heymans
2018-11-30	soc/intel/common: Rework acpi/cpu.asl	Arthur Heymans
2018-11-27	soc/intel/cannonlake: Delete unused macros in lpc.h	Subrata Banik
2018-11-21	soc/intel/cannonlake: Fix IO decode setup	Duncan Laurie
2018-11-18	soc/intel/{cnl, icl}: Remove unnecessary __SIMPLE_DEVICE__ check	Subrata Banik
2018-11-17	soc/intel/cannonlake: Add options for pcie ltr	Lijian Zhao
2018-11-16	src: Remove unneeded include <cbmem.h>	Elyes HAOUAS
2018-11-16	src: Remove unneeded include <console/console.h>	Elyes HAOUAS
2018-11-16	src: Get rid of duplicated includes	Elyes HAOUAS
2018-11-15	soc/intel/cannonlake: Make static IRQ mapping for PIC mode	Subrata Banik
2018-11-15	soc/intel/cannonlake: Make static IRQ mapping for CNP PCH pci devices	Subrata Banik
2018-11-13	soc/intel/cannonlake: Remove SmbusEnable	Duncan Laurie
2018-11-12	src: Remove unneeded include "{arch,cpu}/cpu.h"	Elyes HAOUAS
2018-11-07	mb/{intel/google}: Move CNVi ASL entry from static DSDT to dynamic SSDT gener...	Subrata Banik
2018-11-05	soc/intel/cannonlake: Enable ISH from device	Lijian Zhao
2018-11-05	soc/intel/cannonlake: Remove depreciated UPD selection	Lijian Zhao
2018-11-05	src: Remove unneeded include <arch/ioapic.h>	Elyes HAOUAS
2018-11-02	soc/intel: Enable GPIO functions in verstage	Duncan Laurie
2018-11-01	src: Add missing include <stdint.h>	Elyes HAOUAS
2018-10-30	src: Add missing include <stdint.h>	Elyes HAOUAS
2018-10-27	soc/intel/*: Make FSP header path user configurable	Patrick Georgi
2018-10-26	soc/intel/cannonlake: Add back PM TIMER EMULATION	Lijian Zhao
2018-10-25	soc/intel: Consolidate FSP CAR setup and teardown code	Praveen hodagatta pranesh
2018-10-25	soc/intel/cannonlake: Enable S4 sleep state support	praveen hodagatta pranesh
2018-10-22	intel: Use CF9 reset (part 2)	Patrick Rudolph
2018-10-19	soc/intel/cannonlake: Enable HDA driver support	praveen hodagatta pranesh
2018-10-17	soc/intel/cannonlake: Add CNP PCH-H gpio pin definitions	praveen hodagatta pranesh
2018-10-17	soc/intel/cannonlake: Add new cannon lake PCH-H support	praveen hodagatta pranesh
2018-10-12	drivers/intel/fsp2_0: Hook up IntelFSP repo	Patrick Georgi
2018-10-11	src: Move common IA-32 MSRs to <cpu/x86/msr.h>	Elyes HAOUAS
2018-10-09	soc/intel/cannonlake: Add PCIE ASL entry	Subrata Banik
2018-10-09	soc/intel/cannonlake: Make correct IRQ mapping for CNL SA and PCH PCI devices	Subrata Banik
2018-10-09	soc/intel/cannonlake: Disable Legacy PME for Root ports	Subrata Banik