coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2019-03-24	soc/intel/common: Remove common chip config use_fsp_mp_init	Subrata Banik
2019-03-18	soc/intel/cannonlake: Pass coreboot debug interface info to FSP	Maulik V Vaghela
2019-03-08	coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)	Julius Werner
2019-02-07	soc/intel/cannonlake: Add Whiskeylake SoC kconfig	Subrata Banik
2019-01-25	soc/intel/cannonlake: Disable CpuRatio and SaGv in recovery	Duncan Laurie
2019-01-09	soc/intel/cannonlake: Enable/Disable IPU based on devicetree switch	V Sowmya
2018-12-19	soc/intel/cannonlake: Auto turn on HDA controller	Lijian Zhao
2018-12-19	soc/intel/cannonlake: Enable CPU flexible ratio	Lijian Zhao
2018-11-13	soc/intel/cannonlake: Remove SmbusEnable	Duncan Laurie
2018-11-05	soc/intel/cannonlake: Enable ISH from device	Lijian Zhao
2018-10-17	soc/intel/cannonlake: Add CNP PCH-H gpio pin definitions	praveen hodagatta pranesh
2018-10-17	soc/intel/cannonlake: Add new cannon lake PCH-H support	praveen hodagatta pranesh
2018-10-04	soc/intel/cannonlake: Move the FSP related callbacks to separate files	Rizwan Qureshi