| Age | Commit message (Expand) | Author |
|---|---|---|
| 2017-07-19 | soc/intel/cannonlake: Add minimal changes to call FSP Memoryinit | Lijian Zhao |
| 2017-07-18 | soc/intel/cannonlake: Fix Build break | Lijian Zhao |
| 2017-07-18 | soc/intel/cannonlake: Use common GPIO driver | Andrey Petrov |
| 2017-07-18 | soc/intel/cannonlake: Add PMC headers | Andrey Petrov |
| 2017-07-17 | soc/intel/cannonlake: remove top_of_32bit_ram() declaration | Aaron Durbin |
| 2017-07-13 | soc/intel/cannonlake: Add bootblock PCH | Andrey Petrov |
| 2017-07-13 | soc/intel/cannonlake: Add early CPU initialization | Andrey Petrov |
| 2017-07-12 | soc/intel/cannonlake: Add PCI dev macros and IDs | Andrey Petrov |
| 2017-07-02 | soc/intel/cannonlake: Add bootblock.c | Andrey Petrov |
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index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |