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path: root/src/soc/intel/cannonlake/bootblock
AgeCommit message (Expand)Author
2021-06-22soc/intel/{apl,cnl}: Remove FSP CAR optionArthur Heymans
2021-03-12soc/intel/*: drop UART pad configuration from common codeMichael Niewöhner
2021-03-03soc/intel/cannonlake: Move `gpi_clear_int_cfg()` callAngel Pons
2021-03-01soc/intel: Drop `bootblock_cpu_init()` functionAngel Pons
2021-03-01soc/intel/cannonlake: Drop unnecessary guardAngel Pons
2021-03-01soc/intel/{skl,cnl}: Do not chain-include systemagent.hAngel Pons
2021-02-03pci_ids/intel: Add missing CFL-S GT1 IGD IDsNico Huber
2021-02-03pci_ids/intel: Correct 0x3e96, it's a CFL-S partNico Huber
2021-01-31soc/intel/*: drop incomplete and unneeded check for DMI SRLOCKMichael Niewöhner
2021-01-25soc/intel/{skl,cnl,xsp,icl,tgl,ehl,adl,jsl}: use common LPC mirroringMichael Niewöhner
2021-01-24soc/intel/cnl: use Kconfig to determine PCH typeMichael Niewöhner
2020-12-09soc/intel/common/dmi: Move DMI defines into DMI driver headerSrinidhi N Kaushik
2020-11-29soc/intel: Configure P2SB before other PCH controllersFurquan Shaikh
2020-09-21src/soc/intel: Drop unneeded empty linesElyes HAOUAS
2020-08-07soc/intel/{cnl,icl,jsl,tgl}: Use Bus Master for setting up PWRMBASESubrata Banik
2020-08-05{nb,soc}/intel: Use get_current_microcode_rev() for ucode versionSubrata Banik
2020-07-22soc/intel/cannonlake: Move tco_configure to bootblockTim Wawrzynczak
2020-06-02soc/intel/*/bootblock/cpu.c: Drop unused includesElyes HAOUAS
2020-05-18src: Remove unused 'include <string.h>'Elyes HAOUAS
2020-05-11treewide: Remove "this file is part of" linesPatrick Georgi
2020-05-01soc/intel/cannonlake: Fix 16-bit read/write PCI_COMMAND registerElyes HAOUAS
2020-05-01soc/intel/cannonlake/bootblock: Fix FSP CARPatrick Rudolph
2020-04-06soc/intel/cannonlake: Use SPDX for GPL-2.0-only filesAngel Pons
2020-03-18soc: Remove copyright noticesPatrick Georgi
2020-02-17soc/intel/{cnl,icl,skl,tgl}/bootblock: Update text for DMI PCR 2774Wim Vervoorn
2020-02-17soc/intel{cnl,icl,skl,tgl}/bootblock: Make sure DMI PCR 2770 is setWim Vervoorn
2020-02-04soc/intel: Remove duplicate CPUID entrySubrata Banik
2020-01-18soc/intel/cannonlake/bootblock: Add CML-S 2/4-Core MCH IDsGaggery Tsai
2020-01-08soc/intel/cannonlake: Add Comet Lake H SA 4+2 Device IDJamie Chen
2019-12-26soc/intel/cannonlake: Clean up report_cpu_info() functionUsha P
2019-12-26soc/intel/cannonlake: Refactor pch_early_init() codeUsha P
2019-12-10include/device/pci_ids: Add Coffeelake U IGD P630Christian Walter
2019-12-03soc/intel/cannonlake: Configure GPIO PM configuration in bootblockSubrata Banik
2019-12-02soc/intel/cannonlake: Fix compilationPraveen Hodagatta Pranesh
2019-12-02src/soc/intel: Add Cometlake-S and CMP-H skusGaggery Tsai
2019-11-26soc/intel/{apl,cnl,dnv,skl}: Skip ucode loading by FSP-TSubrata Banik
2019-10-31soc/intel/{cnl,icl,skl}: Fix multiple whitespace issueSubrata Banik
2019-08-28soc/intel/cnl: Add CML IGD IDsMeera Ravindranath
2019-08-26lib/bootblock: Add simplified entry with basetimeKyösti Mälkki
2019-08-16soc/intel/cannonlake: Add 4E/4F to early io initChristian Walter
2019-08-16soc/intel/cannonlake: Add more PCI Ids for CoffeelakeChristian Walter
2019-08-01soc/intel/cannonlake/bootblock: Clear the GPI IS & IE registersDavid Wu
2019-07-30soc/intel/cannonlake: Add new PCI IDsFelix Singer
2019-07-17soc/intel/cannonlake: Add device Ids for new CFL SKUs supportLean Sheng Tan
2019-07-12soc/intel/common: Add Coffee Lake H 6+2 Xeon graphics idNico Huber
2019-07-12soc/intel/common: Add CM246 LPC device idNico Huber
2019-05-22post_code: add post code for hardware initialization failureKeith Short
2019-04-19soc/intel/cannonlake: Add report for iGD 0x3ea1Lijian Zhao
2019-03-08coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner
2019-03-04device/mmio.h: Add include file for MMIO opsKyösti Mälkki
2019-03-04arch/io.h: Drop unnecessary includeKyösti Mälkki
2019-03-01device/pci: Fix PCI accessor headersKyösti Mälkki
2019-02-28soc/intel/cannonlake: Add Comet Lake U SA 2+2 Device IDSubrata Banik
2019-02-26soc/intel/common: Include cometlake PCH IDsRonak Kanabar
2019-02-24soc/intel/common: Include cometlake SA IDsRonak Kanabar
2019-02-24soc/intel/common: Include cometlake CPU IDsRonak Kanabar
2019-02-23soc/intel/cannonlake: Make few more whitespace proper in MCH nameSubrata Banik
2019-02-22soc/intel/cannonlake: Add whitespace proper in CPU/MCH/IGD nameSubrata Banik
2019-02-19soc/intel/common: Add whiskeylake celeron v-0 supportLijian Zhao
2019-01-10soc/intel/common/block: Move tco common functions into block/smbusSubrata Banik
2019-01-09soc/intel: Clean mess around UART_DEBUGNico Huber
2018-12-19soc: Remove useless include <device/pci_ids.h>Elyes HAOUAS
2018-12-13cpuid: Add helper function for cpuid(1) functionsSubrata Banik
2018-12-03soc/intel/cannonlake: Load FSP teardown optionallyLijian Zhao
2018-11-21soc/intel/cannonlake: Fix IO decode setupDuncan Laurie
2018-10-25soc/intel: Consolidate FSP CAR setup and teardown codePraveen hodagatta pranesh
2018-10-17soc/intel/cannonlake: Add new cannon lake PCH-H supportpraveen hodagatta pranesh
2018-08-30soc/intel/cannonlake: Update PMC base address for CNP H and LPMaulik V Vaghela
2018-08-20soc/intel/common/block: Move common uart function to block/uartSubrata Banik
2018-08-20soc/intel/common/block: Add WHL 2-core SKUKrzysztof Sywula
2018-08-10src/soc/intel: Add new device IDs to support coffeelakeMaulik
2018-08-03soc/intel/cannonlake: Report Whiskey Lake infoLijian Zhao
2018-07-09src/soc: Use "foo *bar" instead of "foo* bar"Elyes HAOUAS
2018-06-28soc/intel/common/block: Move p2sb common functions into block/p2sbSubrata Banik
2018-06-14src: Use of device_t is deprecatedElyes HAOUAS
2018-05-22bootblock: Allow more timestamps in bootblock_main_with_timestamp()Julius Werner
2018-01-26soc/intel/cannonlake: Add Cannonlake D0 support in mpinit and reportLijian Zhao
2018-01-25soc/intel/cannonlake: enable pch link in bootblockCaveh Jalali
2018-01-16soc/intel/cannonlake: Program DMI PCR settingsLijian Zhao
2018-01-10soc/intel/cannonlake: Add a call to gspi_early_bar_init in bootblockFurquan Shaikh
2018-01-09soc/intel/cannonlake: Remove redundent CNL CPUID macrosSubrata Banik
2018-01-05soc/intel/cannonlake: Correct PMC/GPIO routing informationLijian Zhao
2017-12-08soc/intel/cannonlake: Add PCH ID support in bootblock/report_platform.cSubrata Banik
2017-10-19soc/intel/cannonlake: Fix HECI error on resetLijian Zhao
2017-10-18soc/intel/cannonlake: Use EBDA area to store cbmem_top addressSubrata Banik
2017-08-21soc/intel/cannonlake: Enable common PMC code for CNLLijian Zhao
2017-08-07soc/intel/cannonlake: Add memory map supportLijian Zhao
2017-07-24Fix files with multiple newlines at the end.Martin Roth
2017-07-22soc/intel/cannonlake: Keep variable from going out of scopeMartin Roth
2017-07-18soc/intel/cannonlake: Fix Build breakLijian Zhao
2017-07-13soc/intel/cannonlake: Add bootblock PCHAndrey Petrov
2017-07-13soc/intel/cannonlake: Add early CPU initializationAndrey Petrov
2017-07-12soc/intel/cannonlake: Add report_platform.cAndrey Petrov
2017-07-02soc/intel/cannonlake: Add bootblock.cAndrey Petrov