| Age | Commit message (Expand) | Author |
|---|
| 2022-11-04 | soc/intel: Include <cpu/cpu.h> instead of <arch/cpu.h> | Elyes Haouas |
| 2022-10-06 | soc/intel/cmn/gfx: Add missing CML-U IGD device IDs | Michał Żygowski |
| 2022-09-16 | soc/intel/cnl: Add Cometlake-H/S Q0 (10+2) CPU ID | Jeremy Soller |
| 2022-07-20 | treewide: Remove unused <cpu/x86/mtrr.h> | Elyes Haouas |
| 2022-04-20 | soc/intel: clean up dmi driver code | Wonkyu Kim |
| 2022-03-07 | src: Make PCI ID define names shorter | Felix Singer |
| 2021-07-17 | soc/intel/cannonlake: Make use of `cpu/intel/cpu_ids.h' | Subrata Banik |
| 2021-06-22 | soc/intel/{apl,cnl}: Remove FSP CAR option | Arthur Heymans |
| 2021-03-12 | soc/intel/*: drop UART pad configuration from common code | Michael Niewöhner |
| 2021-03-03 | soc/intel/cannonlake: Move `gpi_clear_int_cfg()` call | Angel Pons |
| 2021-03-01 | soc/intel: Drop `bootblock_cpu_init()` function | Angel Pons |
| 2021-03-01 | soc/intel/cannonlake: Drop unnecessary guard | Angel Pons |
| 2021-03-01 | soc/intel/{skl,cnl}: Do not chain-include systemagent.h | Angel Pons |
| 2021-02-03 | pci_ids/intel: Add missing CFL-S GT1 IGD IDs | Nico Huber |
| 2021-02-03 | pci_ids/intel: Correct 0x3e96, it's a CFL-S part | Nico Huber |
| 2021-01-31 | soc/intel/*: drop incomplete and unneeded check for DMI SRLOCK | Michael Niewöhner |
| 2021-01-25 | soc/intel/{skl,cnl,xsp,icl,tgl,ehl,adl,jsl}: use common LPC mirroring | Michael Niewöhner |
| 2021-01-24 | soc/intel/cnl: use Kconfig to determine PCH type | Michael Niewöhner |
| 2020-12-09 | soc/intel/common/dmi: Move DMI defines into DMI driver header | Srinidhi N Kaushik |
| 2020-11-29 | soc/intel: Configure P2SB before other PCH controllers | Furquan Shaikh |
| 2020-09-21 | src/soc/intel: Drop unneeded empty lines | Elyes HAOUAS |
| 2020-08-07 | soc/intel/{cnl,icl,jsl,tgl}: Use Bus Master for setting up PWRMBASE | Subrata Banik |
| 2020-08-05 | {nb,soc}/intel: Use get_current_microcode_rev() for ucode version | Subrata Banik |
| 2020-07-22 | soc/intel/cannonlake: Move tco_configure to bootblock | Tim Wawrzynczak |
| 2020-06-02 | soc/intel/*/bootblock/cpu.c: Drop unused includes | Elyes HAOUAS |
| 2020-05-18 | src: Remove unused 'include <string.h>' | Elyes HAOUAS |
| 2020-05-11 | treewide: Remove "this file is part of" lines | Patrick Georgi |
| 2020-05-01 | soc/intel/cannonlake: Fix 16-bit read/write PCI_COMMAND register | Elyes HAOUAS |
| 2020-05-01 | soc/intel/cannonlake/bootblock: Fix FSP CAR | Patrick Rudolph |
| 2020-04-06 | soc/intel/cannonlake: Use SPDX for GPL-2.0-only files | Angel Pons |
| 2020-03-18 | soc: Remove copyright notices | Patrick Georgi |
| 2020-02-17 | soc/intel/{cnl,icl,skl,tgl}/bootblock: Update text for DMI PCR 2774 | Wim Vervoorn |
| 2020-02-17 | soc/intel{cnl,icl,skl,tgl}/bootblock: Make sure DMI PCR 2770 is set | Wim Vervoorn |
| 2020-02-04 | soc/intel: Remove duplicate CPUID entry | Subrata Banik |
| 2020-01-18 | soc/intel/cannonlake/bootblock: Add CML-S 2/4-Core MCH IDs | Gaggery Tsai |
| 2020-01-08 | soc/intel/cannonlake: Add Comet Lake H SA 4+2 Device ID | Jamie Chen |
| 2019-12-26 | soc/intel/cannonlake: Clean up report_cpu_info() function | Usha P |
| 2019-12-26 | soc/intel/cannonlake: Refactor pch_early_init() code | Usha P |
| 2019-12-10 | include/device/pci_ids: Add Coffeelake U IGD P630 | Christian Walter |
| 2019-12-03 | soc/intel/cannonlake: Configure GPIO PM configuration in bootblock | Subrata Banik |
| 2019-12-02 | soc/intel/cannonlake: Fix compilation | Praveen Hodagatta Pranesh |
| 2019-12-02 | src/soc/intel: Add Cometlake-S and CMP-H skus | Gaggery Tsai |
| 2019-11-26 | soc/intel/{apl,cnl,dnv,skl}: Skip ucode loading by FSP-T | Subrata Banik |
| 2019-10-31 | soc/intel/{cnl,icl,skl}: Fix multiple whitespace issue | Subrata Banik |
| 2019-08-28 | soc/intel/cnl: Add CML IGD IDs | Meera Ravindranath |
| 2019-08-26 | lib/bootblock: Add simplified entry with basetime | Kyösti Mälkki |
| 2019-08-16 | soc/intel/cannonlake: Add 4E/4F to early io init | Christian Walter |
| 2019-08-16 | soc/intel/cannonlake: Add more PCI Ids for Coffeelake | Christian Walter |
| 2019-08-01 | soc/intel/cannonlake/bootblock: Clear the GPI IS & IE registers | David Wu |
| 2019-07-30 | soc/intel/cannonlake: Add new PCI IDs | Felix Singer |
| 2019-07-17 | soc/intel/cannonlake: Add device Ids for new CFL SKUs support | Lean Sheng Tan |
| 2019-07-12 | soc/intel/common: Add Coffee Lake H 6+2 Xeon graphics id | Nico Huber |
| 2019-07-12 | soc/intel/common: Add CM246 LPC device id | Nico Huber |
| 2019-05-22 | post_code: add post code for hardware initialization failure | Keith Short |
| 2019-04-19 | soc/intel/cannonlake: Add report for iGD 0x3ea1 | Lijian Zhao |
| 2019-03-08 | coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) | Julius Werner |
| 2019-03-04 | device/mmio.h: Add include file for MMIO ops | Kyösti Mälkki |
| 2019-03-04 | arch/io.h: Drop unnecessary include | Kyösti Mälkki |
| 2019-03-01 | device/pci: Fix PCI accessor headers | Kyösti Mälkki |
| 2019-02-28 | soc/intel/cannonlake: Add Comet Lake U SA 2+2 Device ID | Subrata Banik |
| 2019-02-26 | soc/intel/common: Include cometlake PCH IDs | Ronak Kanabar |
| 2019-02-24 | soc/intel/common: Include cometlake SA IDs | Ronak Kanabar |
| 2019-02-24 | soc/intel/common: Include cometlake CPU IDs | Ronak Kanabar |
| 2019-02-23 | soc/intel/cannonlake: Make few more whitespace proper in MCH name | Subrata Banik |
| 2019-02-22 | soc/intel/cannonlake: Add whitespace proper in CPU/MCH/IGD name | Subrata Banik |
| 2019-02-19 | soc/intel/common: Add whiskeylake celeron v-0 support | Lijian Zhao |
| 2019-01-10 | soc/intel/common/block: Move tco common functions into block/smbus | Subrata Banik |
| 2019-01-09 | soc/intel: Clean mess around UART_DEBUG | Nico Huber |
| 2018-12-19 | soc: Remove useless include <device/pci_ids.h> | Elyes HAOUAS |
| 2018-12-13 | cpuid: Add helper function for cpuid(1) functions | Subrata Banik |
| 2018-12-03 | soc/intel/cannonlake: Load FSP teardown optionally | Lijian Zhao |
| 2018-11-21 | soc/intel/cannonlake: Fix IO decode setup | Duncan Laurie |
| 2018-10-25 | soc/intel: Consolidate FSP CAR setup and teardown code | Praveen hodagatta pranesh |
| 2018-10-17 | soc/intel/cannonlake: Add new cannon lake PCH-H support | praveen hodagatta pranesh |
| 2018-08-30 | soc/intel/cannonlake: Update PMC base address for CNP H and LP | Maulik V Vaghela |
| 2018-08-20 | soc/intel/common/block: Move common uart function to block/uart | Subrata Banik |
| 2018-08-20 | soc/intel/common/block: Add WHL 2-core SKU | Krzysztof Sywula |
| 2018-08-10 | src/soc/intel: Add new device IDs to support coffeelake | Maulik |
| 2018-08-03 | soc/intel/cannonlake: Report Whiskey Lake info | Lijian Zhao |
| 2018-07-09 | src/soc: Use "foo *bar" instead of "foo* bar" | Elyes HAOUAS |
| 2018-06-28 | soc/intel/common/block: Move p2sb common functions into block/p2sb | Subrata Banik |
| 2018-06-14 | src: Use of device_t is deprecated | Elyes HAOUAS |
| 2018-05-22 | bootblock: Allow more timestamps in bootblock_main_with_timestamp() | Julius Werner |
| 2018-01-26 | soc/intel/cannonlake: Add Cannonlake D0 support in mpinit and report | Lijian Zhao |
| 2018-01-25 | soc/intel/cannonlake: enable pch link in bootblock | Caveh Jalali |
| 2018-01-16 | soc/intel/cannonlake: Program DMI PCR settings | Lijian Zhao |
| 2018-01-10 | soc/intel/cannonlake: Add a call to gspi_early_bar_init in bootblock | Furquan Shaikh |
| 2018-01-09 | soc/intel/cannonlake: Remove redundent CNL CPUID macros | Subrata Banik |
| 2018-01-05 | soc/intel/cannonlake: Correct PMC/GPIO routing information | Lijian Zhao |
| 2017-12-08 | soc/intel/cannonlake: Add PCH ID support in bootblock/report_platform.c | Subrata Banik |
| 2017-10-19 | soc/intel/cannonlake: Fix HECI error on reset | Lijian Zhao |
| 2017-10-18 | soc/intel/cannonlake: Use EBDA area to store cbmem_top address | Subrata Banik |
| 2017-08-21 | soc/intel/cannonlake: Enable common PMC code for CNL | Lijian Zhao |
| 2017-08-07 | soc/intel/cannonlake: Add memory map support | Lijian Zhao |
| 2017-07-24 | Fix files with multiple newlines at the end. | Martin Roth |
| 2017-07-22 | soc/intel/cannonlake: Keep variable from going out of scope | Martin Roth |
| 2017-07-18 | soc/intel/cannonlake: Fix Build break | Lijian Zhao |
| 2017-07-13 | soc/intel/cannonlake: Add bootblock PCH | Andrey Petrov |
| 2017-07-13 | soc/intel/cannonlake: Add early CPU initialization | Andrey Petrov |
| 2017-07-12 | soc/intel/cannonlake: Add report_platform.c | Andrey Petrov |
