coreboot.git - my copy of coreboot

Age	Commit message (Collapse)	Author
2018-08-10	src/soc/intel: Add new device IDs to support coffeelake	Maulik
	1. Add new device IDs for SATA, GT and Northbridge to pci_ids.h 2. Add entry to identify CFL U GT and CPU to respective files 3. Add entry to identify CFL U to report_platform.c BUG=none BRANCH=none TEST=Boot to CFL U RVP board with this patch and check if coreboot is able to enumerate various devices and display correct component names properly in serial logs. Change-Id: I47c97fb9eb813587cd655e2bce05a686091619ed Signed-off-by: Maulik <maulik.v.vaghela@intel.com> Reviewed-on: https://review.coreboot.org/27522 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Naresh Solanki <naresh.solanki@intel.com> Reviewed-by: Subrata Banik <subrata.banik@intel.com>
2018-08-03	soc/intel/cannonlake: Report Whiskey Lake info	Lijian Zhao
	According to #574725, report Whiskey Lake CPUID, MCH device ID and graphics device ID in bootblock stage. BUG=N/A TEST=Build and boot up whiskey lake rvp platform and check serial log to see proper CPU/MCH/GFX/PCH got recognized. Change-Id: I3fbc190e0520989d2fd4a9b3294e84d67e49b2cf Signed-off-by: Lijian Zhao <lijian.zhao@intel.com> Reviewed-on: https://review.coreboot.org/27756 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Subrata Banik <subrata.banik@intel.com> Reviewed-by: Pratikkumar V Prajapati <pratikkumar.v.prajapati@intel.com>
2018-07-09	src/soc: Use "foo bar" instead of "foo bar"	Elyes HAOUAS
	Change-Id: I21680354f33916b7b4d913f51a842b5d6c2ecef3 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/27408 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-06-14	src: Use of device_t is deprecated	Elyes HAOUAS
	Change-Id: I9cebfc5c77187bd81094031c43ff6df094908417 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/27010 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-01-26	soc/intel/cannonlake: Add Cannonlake D0 support in mpinit and report	Lijian Zhao
	Both early platform information reporting in bootblock and common code CPU driver will add support for cannonlake D0 stepping processor. BUG=None TEST=Boot up system with D0 stepping CPU installed, check serial log that can display as D0 stepping. Change-Id: I76ee974ee027100d7853a110f95b1601987492e4 Signed-off-by: Lijian Zhao <lijian.zhao@intel.com> Reviewed-on: https://review.coreboot.org/23350 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subrata.banik@intel.com> Reviewed-by: Pratikkumar V Prajapati <pratikkumar.v.prajapati@intel.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-01-09	soc/intel/cannonlake: Remove redundent CNL CPUID macros	Subrata Banik
	This patch ensures all CannonLake CPUIDs are part of mp_init.h hence remove duplicate macro definitions from SoC code. TEST=Build and boot CannonLake RVP Change-Id: Ibb6a22d5c708248bb53522f906cffb462142b7bf Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/23159 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
2017-12-08	soc/intel/cannonlake: Add PCH ID support in bootblock/report_platform.c	Subrata Banik
	This patch ensures that all required information for pch/mch/igd deviceid and revision are available in single stage and makes use of local references. TEST=Build and boot cannonlake_rvp to get PCH information as below PCH: device id xxxx (rev xx) is Cannonlake-Y Premium Change-Id: I420e94043145e8a5adcf8bb51239657891915d84 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/22767 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-07-22	soc/intel/cannonlake: Keep variable from going out of scope	Martin Roth
	The variable p was going out of scope while still being pointed to by *cpu_name. Fix coverity ID 1378215 (Pointer to local outside scope) Change-Id: I6ad7b1919104b4d97869efe5065e39c2a43de638 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/20682 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>
2017-07-12	soc/intel/cannonlake: Add report_platform.c	Andrey Petrov
	Dump basic platform information early in bootblock. Change-Id: I12d1c9dd9f0518c133de465a4db72a0664a94eef Signed-off-by: Andrey Petrov <andrey.petrov@intel.com> Reviewed-on: https://review.coreboot.org/20068 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>