Age | Commit message (Expand) | Author |
2019-12-26 | soc/intel/cannonlake: Move GPIO PM configuration to soc level | Eric Lai |
2019-12-17 | soc/intel{cannonlake,icelake}/northbridge.asl: Correct flash range | Wim Vervoorn |
2019-12-02 | soc/intel/cannonlake: Add gfx.asl file | Mathew King |
2019-11-01 | soc/intel/{cnl,icl,skl}: Move ipu.asl into common/block/acpi | Subrata Banik |
2019-11-01 | soc/intel/{cnl,icl}: Move globalnvs.asl/nvs.h into common/block/ | Subrata Banik |
2019-11-01 | soc/intel/{IA-CPU/SOC}: Move sleepstates.asl into southbridge/intel/common/acpi | Subrata Banik |
2019-11-01 | soc/intel/{apl,cnl,dnv,icl,skl}: Move lpc.asl into common/block/acpi | Subrata Banik |
2019-10-31 | soc/intel/{cnl,icl,skl}: Remove unused SMI opregion | Subrata Banik |
2019-10-25 | soc/intel: Drop wrong _ADR objects | Elyes HAOUAS |
2019-07-13 | soc/intel/cannonlake: Remove unused header files from southbridge.asl | Aamir Bohra |
2019-07-11 | soc/intel/cannonlake: Add GPID and CGPM methods to GPIO ASL | Tim Wawrzynczak |
2019-07-11 | soc/intel/cannonlake: Make EC S0ix notification optional in LPIT | Tim Wawrzynczak |
2019-06-07 | soc/intel/cannonlake: Add _DSM method for SD controller | V Sowmya |
2019-05-06 | soc/intel/cannonlake/acpi: Add board level s0ix call back | Eric Lai |
2019-03-08 | coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) | Julius Werner |
2019-03-04 | soc/intel/cnl/acpi: add ish ACPI device | Jett Rink |
2019-03-04 | soc/intel/cannonlake: Fix DSDT compile remarks | Lijian Zhao |
2019-02-27 | soc/intel/cannonlake: Add a config for configuring SD_VDD1_PWR_EN# | Rizwan Qureshi |
2019-02-27 | soc/intel/cannonlake: Add ASL functions to manipulate RX/TX buffers | Rizwan Qureshi |
2019-02-26 | soc/intel/cannonlake: Update GPIO definitions for Virtual GPIO | Rizwan Qureshi |
2019-02-22 | soc/intel/cannonlake: Add ASL function for setting pad mode | Rizwan Qureshi |
2019-02-20 | src/soc/intel/cannonlake: Add _DSM methods for LPIT table | Lijian Zhao |
2019-01-23 | soc/intel/cannonlake: Replace device name B0D4 with TCPU | Sumeet Pawnikar |
2019-01-03 | soc/intel/cannonlake: Add cannonlake ACPI GPIO op | Lijian Zhao |
2018-12-10 | soc/intel/cannonlake: Fix GPIO reporting | Duncan Laurie |
2018-12-04 | soc/intel/cannonlake: Add DPTF ACPI code | Duncan Laurie |
2018-11-30 | cpu/intel/common: Use a common acpi/cpu.asl file | Arthur Heymans |
2018-11-30 | soc/intel/common: Rework acpi/cpu.asl | Arthur Heymans |
2018-11-15 | soc/intel/cannonlake: Make static IRQ mapping for CNP PCH pci devices | Subrata Banik |
2018-11-07 | mb/{intel/google}: Move CNVi ASL entry from static DSDT to dynamic SSDT gener... | Subrata Banik |
2018-10-25 | soc/intel/cannonlake: Enable S4 sleep state support | praveen hodagatta pranesh |
2018-10-17 | soc/intel/cannonlake: Add CNP PCH-H gpio pin definitions | praveen hodagatta pranesh |
2018-10-09 | soc/intel/cannonlake: Add PCIE ASL entry | Subrata Banik |
2018-10-09 | soc/intel/cannonlake: Make correct IRQ mapping for CNL SA and PCH PCI devices | Subrata Banik |
2018-09-28 | soc/intel/cannonlake: Add ACPI entry for LAN | Lijian Zhao |
2018-08-30 | soc/intel/cannonlake: Fix comment errors for SMBUS | Lijian Zhao |
2018-04-05 | soc/intel/cannonlake: Clear EMMC timeout when boot source is not EMMC | Bora Guvendik |
2018-02-22 | soc/intel/cannonlake: Clear EMMC timeout register | Lijian Zhao |
2018-02-16 | soc/intel/cannonlake: Update GPIO ASL | Lijian Zhao |
2018-02-16 | soc/intel/cannonlake: Use common PCR ASL | Lijian Zhao |
2018-01-24 | soc/intel/cannonlake: Add child CARD device into eMMC/SD controller | Subrata Banik |
2018-01-24 | soc/intel/cannonlake: Port SD Controller W/A from Intel Reference code | Subrata Banik |
2018-01-24 | soc/intel/cannonlake: Port eMMC controller W/A from Intel Reference code | Subrata Banik |
2017-12-13 | src/soc/intel/cannonlake: Add _PRW for CNVi | Bora Guvendik |
2017-11-23 | soc/intel/cannonlake: Add PM methods to power gate SD card controller | Vaibhav Shankar |
2017-11-20 | soc/intel/cannonlake: Add ACPI workaround for EMMC | Lijian Zhao |
2017-11-17 | soc/intel/cannonlake: Add cpu.asl file | Shaunak Saha |
2017-11-15 | soc/intel/cannonlake: Fix and clean up xhci ACPI code | Vaibhav Shankar |
2017-10-20 | soc/intel/cannonlake: Add platform.asl | Lijian Zhao |
2017-10-12 | soc/intel/cannonlake: add length information for communities | Bora Guvendik |
2017-10-12 | soc/intel/cannonlake: Add ACPI platform sleep capability | Vaibhav Shankar |
2017-10-05 | soc/intel/cannonlake: Add all the SOC level DSDT tables | Lijian Zhao |
2017-10-03 | soc/intel/cannonlake: add initial ASL methods for SCS, GPIO | Bora Guvendik |
2017-10-03 | soc/intel/cannonlake: Add northbridge dsdt table | Lijian Zhao |
2017-09-19 | soc/intel/cannonlake: Add PCIE IRQs | Bora Guvendik |
2017-09-13 | soc/intel/cannonlake: Add common ACPI support for CNL | Lijian Zhao |