| Age | Commit message (Expand) | Author |
|---|---|---|
| 2019-12-17 | soc/intel{cannonlake,icelake}/northbridge.asl: Correct flash range | Wim Vervoorn |
| 2019-10-25 | soc/intel: Drop wrong _ADR objects | Elyes HAOUAS |
| 2019-03-04 | soc/intel/cannonlake: Fix DSDT compile remarks | Lijian Zhao |
| 2017-10-03 | soc/intel/cannonlake: Add northbridge dsdt table | Lijian Zhao |
| 2017-09-19 | soc/intel/cannonlake: Add PCIE IRQs | Bora Guvendik |
 |
index : coreboot.git | |
| my copy of coreboot | gitea |
| aboutsummaryrefslogtreecommitdiff |