summaryrefslogtreecommitdiff
path: root/src/soc/intel/cannonlake/Kconfig
AgeCommit message (Expand)Author
2017-09-01soc/intel/canonlake: Enable LPSS UART in 32bit PCI modeLijian Zhao
2017-08-30soc/intel/{cannonlake,skylake}: Add active default value for UART_FOR_CONSOLESubrata Banik
2017-08-25soc/intel/cannonlake: Init UPD params based on configPratik Prajapati
2017-08-24soc/intel/cannonlake: Add cpu.c and MP init supportPratik Prajapati
2017-08-21soc/intel/cannonlake: Enable common PMC code for CNLLijian Zhao
2017-08-21soc/intel/cannonlake: Add Kconfig option to select UART indexSubrata Banik
2017-08-17soc/intel/cannonlake: Add SPI flash controller driverLijian Zhao
2017-08-15soc/intel/cannonlake: Add postcar stage supportLijian Zhao
2017-08-11soc/cannonlake: Enable SMM code for Cannon LakeBrandon Breitenstein
2017-08-03soc/intel/cannonlake: Sort Kconfig for CannonlakeLijian Zhao
2017-07-21Revert "soc/intel/cannonlake: Add postcar stage support"Martin Roth
2017-07-21soc/intel/cannonlake: Add postcar stage supportLijian Zhao
2017-07-20soc/intel/cannonlake: Make ramstage relocatableLijian Zhao
2017-07-19soc/intel/cannonlake: Add microcode supportLijian Zhao
2017-07-18soc/intel/cannonlake: Use common GPIO driverAndrey Petrov
2017-07-13soc/intel/cannonlake: Add early CPU initializationAndrey Petrov
2017-06-29soc/intel/cannonlake: Add initial dummy directoryLijian Zhao