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path: root/src/soc/intel/cannonlake/Kconfig
AgeCommit message (Expand)Author
2019-08-11arch/x86: Flip option NO_CAR_GLOBAL_MIGRATIONKyösti Mälkki
2019-08-11arch/x86: Enable POSTCAR_CONSOLE by defaultKyösti Mälkki
2019-08-08lib/stage_cache: Refactor Kconfig optionsKyösti Mälkki
2019-08-02soc/intel/common/pch: Move thermal kconfig selection into common/pchSubrata Banik
2019-07-31soc/intel/cannonlake: Enable FSP to use coreboot stack for cometlakeAamir Bohra
2019-07-31soc/intel/cannonlake: Enable PCH Thermal Sensor configuration for S0ixSumeet Pawnikar
2019-07-16soc/intel/{cnl,icl}: Always use CAR NEM enhanced by defaultAngel Pons
2019-07-11soc/intel/common/timer: Move USE_LEGACY_8254_TIMER into common/block/timerSubrata Banik
2019-07-09arch/x86: Flip HAVE_MONOTONIC_TIMER defaultKyösti Mälkki
2019-07-09cpu/x86: Flip SMM_TSEG defaultKyösti Mälkki
2019-07-06soc/intel/cannonlake: Override PRERAM_CBMEM_CONSOLE_SIZE default valueSubrata Banik
2019-07-02soc/intel/cannonlake: Add support to log XHCI wake eventsPaul Fagerburg
2019-07-01Use 3rdparty/intel-microcodeArthur Heymans
2019-06-28soc/intel/cannonlake: fix use of legacy 8254 timerMatt DeVillier
2019-06-26soc/intel/cannonlake/Kconfig: Don't have all variants select SOC_INTEL_CANNON...Arthur Heymans
2019-06-21soc/intel/cannonlake: Rename SOC_INTEL_COMMON_CANNONLAKE_BASEArthur Heymans
2019-06-13soc/intel/{cml, whl}: Add option to skip HECI disable in SMMSubrata Banik
2019-06-03soc/intel: Replace UART_BASE() and friends with a KconfigNico Huber
2019-05-09soc/intel/cannonlake: Fix pcie clock numberLijian Zhao
2019-05-06soc/intel/cannonlake: Add GPIO dual-route support.Tim Wawrzynczak
2019-04-30vboot: refactor OPROM codeJoel Kitching
2019-04-253rdparty/fsp: Update submodule pointer to upstream masterMatt DeVillier
2019-04-23soc/intel/cannonlake: Enable PlatformDebugConsent by KconfigKane Chen
2019-04-22Revert "soc/intel/cannonlake: Enable coreboot MP PPI service for WHL/CML"Lijian Zhao
2019-04-16soc/intel/cannonlake: Implement soc side VMX supportRonak Kanabar
2019-04-16soc/intel/cannonlake: Enable coreboot MP PPI service for WHL/CMLSubrata Banik
2019-04-12soc/intel/cannonlake: Select FSP_M_XIPFurquan Shaikh
2019-04-12soc/intel/cannonlake: Do not use XIP_ROM_SIZEFurquan Shaikh
2019-02-28soc/intel/cannonlake: Add CometLake SoC supportSubrata Banik
2019-02-27soc/intel/cannonlake: Add a config for configuring SD_VDD1_PWR_EN#Rizwan Qureshi
2019-02-07soc/intel/cannonlake: Add Whiskeylake SoC kconfigSubrata Banik
2019-02-04soc/intel/cannonlake: Remove SOC_INTEL_CANNONLAKE_MEMCFG_INIT KconfigSubrata Banik
2019-01-12soc/intel/cannonlake: Hook up MicrocodeLijian Zhao
2019-01-10Untangle CBFS microcode updatesNico Huber
2019-01-09soc/intel: Clean mess around UART_DEBUGNico Huber
2018-12-07soc/intel/cannonlake: Fix I2C clock inputDuncan Laurie
2018-12-04soc/intel/cannonlake: Increase bootblock sizeDuncan Laurie
2018-10-27soc/intel/*: Make FSP header path user configurablePatrick Georgi
2018-10-25soc/intel: Consolidate FSP CAR setup and teardown codePraveen hodagatta pranesh
2018-10-22intel: Use CF9 reset (part 2)Patrick Rudolph
2018-10-19soc/intel/cannonlake: Enable HDA driver supportpraveen hodagatta pranesh
2018-10-17soc/intel/cannonlake: Add CNP PCH-H gpio pin definitionspraveen hodagatta pranesh
2018-10-17soc/intel/cannonlake: Add new cannon lake PCH-H supportpraveen hodagatta pranesh
2018-10-12drivers/intel/fsp2_0: Hook up IntelFSP repoPatrick Georgi
2018-09-14soc/intel/denverton_ns: Enable common block PMCJulien Viard de Galbert
2018-09-13src/*/intel/: clarify Kconfig options regarding IFDStefan Tauner
2018-09-10soc/intel/cannonlake: Correct number of root ports for CNL PCH HMaulik V Vaghela
2018-08-28soc/intel/cannonlake: Change LPDDR4 to MEMCFGLijian Zhao
2018-08-03soc/intel/coffeelake: Add initial coffeelake supportLijian Zhao
2018-06-23soc/intel/cannonlake: Disable UART_DEBUG by defaultSubrata Banik
2018-06-12drivers/intel/gma: Unify VBT related Kconfig namesNico Huber
2018-06-06arch/x86: Make RELOCATABLE_RAMSTAGE the defaultKyösti Mälkki
2018-06-06soc/intel/common/block: Add common chip config blockSubrata Banik
2018-06-06soc/intel/{cannonlake, skylake}: Select Gen-6 PCH binding for SKL/CNLSubrata Banik
2018-05-30soc/intel/cannonlake: Enable IDT and expection handling support for all stagesAamir Bohra
2018-05-27soc/intel/cannonlake: Select common XHCI codeSubrata Banik
2018-05-25soc/intel/cannonlake: Reduce STACK_SIZE to 4KiBSubrata Banik
2018-05-19soc/intel/cannonlake: Add CONFIG_SMM_RESERVED_SIZE configSubrata Banik
2018-05-05soc/intel/cannonlake: Include stage cache support for CNLSubrata Banik
2018-05-04ifdtool: Add a list of known platforms that support IFD_VERSION_2Furquan Shaikh
2018-04-10soc/intel/cannonlake: Set Cannonlake I2C clockLijian Zhao
2018-04-10soc/intel/common: prepare for lpss clock splitAaron Durbin
2018-03-28soc/intel/cannonlake: Limit xDCI feature when VBOOT is enabledDuncan Laurie
2018-02-07soc/intel/cannonlake: Select SOC_AHCI_PORT_IMPLEMENTED_INVERT Kconfig for CNP...Subrata Banik
2018-02-06soc/intel/cannonlake: Increase heap sizeJohn Zhao
2018-01-31soc/intel/cannonlake: CannonaLake make use of FVI informationSubrata Banik
2018-01-31drivers/intel/fsp2_0: Unbind UDK2015 Kconfig from FSP2.0 driverSubrata Banik
2018-01-23mainboard/intel/cannonlake_rvp: Add support for MAX98373 speaker ampN, Harshapriya
2018-01-23soc/intel/cannonlake: Add audio NHLT supportLijian Zhao
2018-01-17soc/intel/cannonlake: Add option to select FSP_CARSubrata Banik
2018-01-07soc/intel/cannonlake: provide LPDDR4 memory initNick Vaccaro
2018-01-05soc/intel/cannonlake: Correct PMC/GPIO routing informationLijian Zhao
2017-12-23soc/intel/cannonlake: Select SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2Furquan Shaikh
2017-12-22ic2/designware: Move Intel i2c logic to shared driverChris Ching
2017-12-16soc/intel/common/fast_spi: implement spi_flash_ctrlr_protect_region()Aaron Durbin
2017-12-07soc/intel/cannonlake: Make use of Intel common Graphics blockSubrata Banik
2017-11-13soc/intel/cannonlake: Define default LPSS clockLijian Zhao
2017-11-11soc/intel/cannonlake: Make use of Intel SPI common blockSubrata Banik
2017-11-04soc/intel/cannonlake: Add DSP supportLijian Zhao
2017-11-04soc/intel/cannonlake: Install common i2cLijian Zhao
2017-11-01soc/intel/cannonlake: Use SCS common codeBora Guvendik
2017-10-27soc/intel/cannonlake: Use common p2sb driverLijian Zhao
2017-10-23soc/intel/cannonlake: Increase stack size from 4KiB to 8KiBJohn Zhao
2017-10-22soc/intel/cannonlake: Change max root port to 16Lijian Zhao
2017-10-19soc/intel/cannonlake: Add IGD Support and pre-OS display codeAbhay Kumar
2017-10-18soc/intel/cannonlake: Use EBDA area to store cbmem_top addressSubrata Banik
2017-10-11soc/intel/cannonlake: Change default UART number to 2Lijian Zhao
2017-10-06soc/intel/cannonlake: Enable MRC cacheLijian Zhao
2017-10-06soc/intel/cannonlake: reduce bootblock sizeAaron Durbin
2017-10-03soc/intel/cannonlake: Fill the SMI usageLijian Zhao
2017-10-03soc/intel/cannonlake: Add lpc pci driverLijian Zhao
2017-09-27soc/intel/cannonlake: Add FSP GOP supportAbhay kumar
2017-09-13soc/intel/cannonlake: Add common ACPI support for CNLLijian Zhao
2017-09-06soc/intel/cannonlake: Add Vboot/ChromeOS supportLijian Zhao
2017-09-01soc/intel/cannonlake: Define Max PCIE Root PortsPratik Prajapati
2017-09-01soc/intel/cannonlake: add gpio files to makeNick Vaccaro
2017-09-01soc/intel/canonlake: Enable LPSS UART in 32bit PCI modeLijian Zhao
2017-08-30soc/intel/{cannonlake,skylake}: Add active default value for UART_FOR_CONSOLESubrata Banik
2017-08-25soc/intel/cannonlake: Init UPD params based on configPratik Prajapati
2017-08-24soc/intel/cannonlake: Add cpu.c and MP init supportPratik Prajapati