| Age | Commit message (Expand) | Author |
|---|---|---|
| 2015-05-21 | Remove address from GPLv2 headers | Patrick Georgi |
| 2015-04-30 | intel/broadwell: bootstate mechanism only exists in ramstage | Patrick Georgi |
| 2015-04-10 | broadwell: Add function to apply PRR to a range of SPI flash | Duncan Laurie |
| 2015-04-07 | broadwell: Change all SoC headers to <soc/headername.h> system | Julius Werner |
| 2015-03-18 | bootstate: use structure pointers for scheduling callbacks | Aaron Durbin |
| 2015-02-15 | x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer | Kevin Paul Herbert |
| 2014-12-31 | broadwell: Preparations for building | Marc Jones |
| 2014-12-08 | intel/broadwell: Spelling fixes | Martin Roth |
| 2014-10-22 | broadwell: add new intel SOC | Duncan Laurie |
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index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |