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path: root/src/soc/intel/broadwell/pcie.c
AgeCommit message (Expand)Author
2020-05-01soc/intel/broadwell: Fix 16-bit read/write PCI_COMMAND registerElyes HAOUAS
2020-04-06soc/intel/broadwell: Use SPDX for GPL-2.0-only filesAngel Pons
2020-03-18soc: Remove copyright noticesPatrick Georgi
2019-10-01intel/pci: Utilise pci_def.h for PCI_BRIDGE_CONTROLKyösti Mälkki
2019-07-18soc/intel: Use config_of()Kyösti Mälkki
2019-03-27device/pciexp_device: Convert LTR non-snoop/snoop value into common macroSubrata Banik
2019-03-21{northbridge, soc, southbridge}/intel: Make use of generic set_subsystem()Subrata Banik
2019-03-08coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner
2018-06-01soc/intel/broadwell: Get rid of device_tElyes HAOUAS
2018-05-08intel/broadwell: Add option to enable/disable the PCIe AER capabilityYouness Alaoui
2018-05-08intel/broadwell: If L1 Sub state is disabled, do not set capabilityYouness Alaoui
2018-04-20pci: Move inline PCI functions to pci_ops.hPatrick Rudolph
2017-03-17soc/intel/broadwell: Fix other issues detected by checkpatchLee Leahy
2017-03-17soc/intel/broadwell: Add int to unsignedLee Leahy
2016-12-06PCI ops: Define read-modify-write routines globallyKyösti Mälkki
2016-12-06intel PCI ops: Remove explicit PCI MMCONF accessKyösti Mälkki
2016-07-31intel/broadwell: fix typoPatrick Georgi
2015-12-20soc/intel/broadwell: Init var before use, only use when neededMartin Roth
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-05-21Remove address from GPLv2 headersPatrick Georgi
2015-04-10broadwell: Set PCIe replay timeout to 0xDDuncan Laurie
2015-04-10broadwell: Skip steps when disabling PCIe portDuncan Laurie
2015-04-10broadwell: Fix PCIe ports programming sequences to enable HSIOPCWenkai Du
2015-04-10Broadwell: Synchronization with FRC for Root Port Power ManagementKenji Chen
2015-04-07broadwell: Change all SoC headers to <soc/headername.h> systemJulius Werner
2015-04-04Broadwell: Fix PCIe L1 Sub-State capability ID not filled.Kenji Chen
2015-04-02Broadwell: Select PCIE_L1_SUB_STATE and apply Broadwell settings.Kenji Chen
2015-04-02Broadwell: Synchronize for power management with FRCKenji Chen
2015-04-02Broadwell: Synchronize RO, Link Arbiter, and OBFF with FRCKenji Chen
2015-04-02Broadwell: Revise programming flow for write-once registersKenji Chen
2015-04-02broadwell: Configure IOSF Port and Grant CountKenji Chen
2015-04-02broadwell: Update PCIe configuration to follow BWGKane Chen
2015-03-27broadwell: Fix some errors in selftestKane Chen
2015-03-27broadwell: Apply pcie updates from 2.1.0 ref codeKane Chen
2015-03-27broadwell: Misc updates from 2.1.0 ref codeDuncan Laurie
2014-12-08intel/broadwell: Spelling fixesMartin Roth
2014-10-22broadwell: add new intel SOCDuncan Laurie