summaryrefslogtreecommitdiff
path: root/src/soc/intel/braswell
AgeCommit message (Expand)Author
2015-10-27FSP 1.1: Replace soc_ prefix with fsp_Lee Leahy
2015-10-27FSP 1.1: Move common FSP codeLee Leahy
2015-10-15cpu/mtrr.h: Fix macro names for MTRR registersAlexandru Gagniuc
2015-10-11intel fsp1_1: prepare for romstage vboot verification splitAaron Durbin
2015-10-11soc/intel/common: remove chipset specific callsAaron Durbin
2015-10-11intel SOC common: Remove unused parametersLee Leahy
2015-10-11Braswell: Modify CB to accomodate new FSPv83Subrata Banik
2015-10-05Add EM100 'hyper term' spi console support in ramstage & smmMartin Roth
2015-09-30cpu: microcode: Use microcode stored in binary formatAlexandru Gagniuc
2015-09-29intel: auto include intel/common/firmwareAaron Durbin
2015-09-17braswell: Switch to using common ACPI _SWS codeDuncan Laurie
2015-09-16Move final Intel chipsets with ME to intel/common/firmwareMartin Roth
2015-09-10fsp1_1: provide binding to UEFI versionAaron Durbin
2015-09-09braswell: acpi: Allow DPTF thresholds to be defined at board-levelShawn Nematbakhsh
2015-09-09x86: bootblock: remove linking and program flow from build systemAaron Durbin
2015-09-08braswell: Tristate CFIO 139 and CFIO 140Ravi Sarawadi
2015-09-07microcode: Unify rules to add microcode to CBFS once againAlexandru Gagniuc
2015-09-07Drop "See file CREDITS..." commentStefan Reinauer
2015-09-04bootstate: remove need for #ifdef ENV_RAMSTAGEAaron Durbin
2015-08-31soc/intel: Fix dependency of CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEMAlexandru Gagniuc
2015-08-31soc/intel/braswell/Kconfig: Remove ENABLE_MRC_CACHE KconfigAlexandru Gagniuc
2015-08-29fsp raminit: Add romstage_params to soc_memory_init_paramsDuncan Laurie
2015-08-29intel/braswell: allow dirty cache line evictions for SMRAM to stickChiranjeevi Rapolu
2015-08-29intel/braswell: Adding conditional statements to turn on/off DPTF WIFI and WWANPrince Agyeman
2015-08-29intel/braswell: remove CBFS_SIZE option in SoC directoryAaron Durbin
2015-08-28soc/*/Makefile.inc: Do not add soc/common as a subdirAlexandru Gagniuc
2015-08-14intel/common: fix stage_cache_external_region()Aaron Durbin
2015-07-29intel/braswell: fix buildJenny TC
2015-07-29BCRD2: Enable PMIC SVID configJenny TC
2015-07-21intel fsp: remove CHIPSET_RESERVED_MEM_BYTESAaron Durbin
2015-07-21braswell: clean up \_PR entriesJagadish Krishnamoorthy
2015-07-14Braswell: Use CBFS image type nameLee Leahy
2015-07-10Braswell: Move the microcode into a subdirectoryLee Leahy
2015-07-08Braswell: Fix error in the warranty statementLee Leahy
2015-07-06Braswell: Update to end of June.Lee Leahy
2015-07-06Braswell: Update the ACPI tablesLee Leahy
2015-07-04Kconfig: Fix references to obsolete symbolsMartin Roth
2015-06-25Braswell: Remove copyright addressLee Leahy
2015-06-25Braswell: Add Braswell SOC supportLee Leahy
2015-06-24Kconfig: Get rid of obsolete symbolsMartin Roth
2015-06-23Kconfig: Move CBFS_SIZE into Mainboard menuMartin Roth
2015-06-09stage_cache: use cbmem init hooksAaron Durbin
2015-06-08Remove empty lines at end of fileElyes HAOUAS
2015-06-02cbfs: new API and better program loadingAaron Durbin
2015-05-28smm: Merge configs SMM_MODULES and SMM_TSEGVladimir Serbinenko
2015-05-28Remove address from GPLv2 headersPatrick Georgi
2015-05-27Move TPM code out of chromeosVladimir Serbinenko
2015-05-23Braswell: Use Baytrail as Comparison BaseLee Leahy
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-24 17:33:32 +0000