| Age | Commit message (Expand) | Author |
|---|---|---|
| 2018-04-24 | compiler.h: add __weak macro | Aaron Durbin |
| 2017-09-20 | soc/intel/braswell: refactor rtc failure checking | Aaron Durbin |
| 2017-08-25 | soc/intel/braswell: Put SERIRQ in quiet mode | Hannah Williams |
| 2017-08-07 | soc/intel/braswell: Fix SPI write after FLOCKDN is set | Hannah Williams |
| 2017-03-17 | soc/intel/braswell: Fix most of the issues detected by checkpatch | Lee Leahy |
| 2017-03-17 | soc/intel/braswell: Add int to unsigned | Lee Leahy |
| 2015-10-31 | tree: drop last paragraph of GPL copyright header | Patrick Georgi |
| 2015-07-06 | Braswell: Update the ACPI tables | Lee Leahy |
| 2015-06-25 | Braswell: Add Braswell SOC support | Lee Leahy |
| 2015-05-28 | Remove address from GPLv2 headers | Patrick Georgi |
| 2015-05-23 | Braswell: Use Baytrail as Comparison Base | Lee Leahy |
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index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |