Age | Commit message (Expand) | Author |
2018-11-16 | soc/intel/braswell: add vmx support via CPU_INTEL_COMMON | Matt DeVillier |
2018-10-23 | src: Remove unneeded whitespace | Elyes HAOUAS |
2018-10-11 | src: Move common IA-32 MSRs to <cpu/x86/msr.h> | Elyes HAOUAS |
2018-10-05 | src: Fix MSR_PKG_CST_CONFIG_CONTROL register name | Elyes HAOUAS |
2018-07-24 | cpu/x86/mtrr.h: Rename MSR SMRR_PHYS_x to IA32_SMRR_PHYSx | Arthur Heymans |
2018-06-04 | soc/intel/braswell: Get rid of device_t | Elyes HAOUAS |
2017-11-23 | Constify struct cpu_device_id instances | Jonathan Neuschäfer |
2017-09-11 | cpu/x86/mp_init: remove adjust_cpu_apic_entry() | Aaron Durbin |
2017-03-17 | soc/intel/braswell: Fix most of the issues detected by checkpatch | Lee Leahy |
2016-05-06 | soc/intel/braswell: convert to using common MP and SMM init | Aaron Durbin |
2016-05-02 | cpu/x86/mp_init: remove unused callback arguments | Aaron Durbin |
2016-03-08 | x86 chipsets: utilize x86_setup_mtrrs_with_detect() | Aaron Durbin |
2016-01-14 | soc/braswell: Add CPUID for D0 stepping | Divya Sasidharan |
2015-10-31 | tree: drop last paragraph of GPL copyright header | Patrick Georgi |
2015-10-27 | FSP 1.1: Move common FSP code | Lee Leahy |
2015-10-15 | cpu/mtrr.h: Fix macro names for MTRR registers | Alexandru Gagniuc |
2015-08-29 | intel/braswell: allow dirty cache line evictions for SMRAM to stick | Chiranjeevi Rapolu |
2015-07-06 | Braswell: Update to end of June. | Lee Leahy |
2015-06-25 | Braswell: Add Braswell SOC support | Lee Leahy |
2015-05-28 | Remove address from GPLv2 headers | Patrick Georgi |
2015-05-23 | Braswell: Use Baytrail as Comparison Base | Lee Leahy |