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path: root/src/soc/intel/braswell/chip.h
AgeCommit message (Expand)Author
2019-05-03soc/intel/braswell: add default option to use public FSPMatt DeVillier
2019-04-04soc/intel/braswell: Correct serial IRQ supportFrans Hendriks
2017-09-08soc/intel/braswell: add USB2 PHY PERPORTRXISET UPDKevin Chiu
2017-09-08soc/intel/braswell: Add I2C clock config optionsDivagar Mohandass
2017-03-17soc/intel/braswell: Fix most of the issues detected by checkpatchLee Leahy
2017-03-17soc/intel/braswell: Fix spacing issues detected by checkpatchLee Leahy
2016-01-28soc/braswell: Add interface to program USB2_COMPBG registershkim
2016-01-28Strago: Enable CA MirrorShobhit Srivastava
2016-01-28soc/braswell: Disable SD card detect simulation in FSPDivya Sasidharan
2016-01-28soc/braswell: Fix DSP clockfdurairx
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-10-11Braswell: Modify CB to accomodate new FSPv83Subrata Banik
2015-09-10fsp1_1: provide binding to UEFI versionAaron Durbin
2015-07-29intel/braswell: fix buildJenny TC
2015-07-29BCRD2: Enable PMIC SVID configJenny TC
2015-07-06Braswell: Update to end of June.Lee Leahy
2015-06-25Braswell: Add Braswell SOC supportLee Leahy
2015-05-28Remove address from GPLv2 headersPatrick Georgi
2015-05-23Braswell: Use Baytrail as Comparison BaseLee Leahy
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