index
:
coreboot.git
macbookair5_2
macbookpro10_1
main
master
mbp101_medisable
mbp101_medisable_1
mbp82
x230
my copy of coreboot
User &
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
soc
/
intel
/
braswell
/
chip.c
Age
Commit message (
Expand
)
Author
2018-06-04
soc/intel/braswell: Get rid of device_t
Elyes HAOUAS
2018-05-08
{mb,nb,soc}: Remove references to pci_bus_default_ops()
Nico Huber
2018-04-24
compiler.h: add __weak macro
Aaron Durbin
2017-09-08
soc/intel/braswell: add USB2 PHY PERPORTRXISET UPD
Kevin Chiu
2017-09-08
soc/intel/braswell: Add USB2 phy setting override
Matt DeVillier
2017-09-08
soc/intel/braswell: Add SoC stepping identify helper
Matt DeVillier
2017-09-08
soc/intel/braswell: Add I2C clock config options
Divagar Mohandass
2017-03-17
soc/intel/braswell: Add int to unsigned
Lee Leahy
2016-01-28
soc/braswell: Fix issues found during static code analysis
Ravi Sarawadi
2016-01-28
soc/braswell: Disable SD card detect simulation in FSP
Divya Sasidharan
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-10-27
FSP 1.1: Replace soc_ prefix with fsp_
Lee Leahy
2015-10-11
Braswell: Modify CB to accomodate new FSPv83
Subrata Banik
2015-09-10
fsp1_1: provide binding to UEFI version
Aaron Durbin
2015-06-25
Braswell: Add Braswell SOC support
Lee Leahy
2015-05-28
Remove address from GPLv2 headers
Patrick Georgi
2015-05-23
Braswell: Use Baytrail as Comparison Base
Lee Leahy